[PATCH net-next] net: phy: aquantia: clear PMD Global Transmit Disable bit during init

Robert Marko posted 1 patch 1 year, 12 months ago
drivers/net/phy/aquantia/aquantia_main.c | 9 +++++++++
1 file changed, 9 insertions(+)
[PATCH net-next] net: phy: aquantia: clear PMD Global Transmit Disable bit during init
Posted by Robert Marko 1 year, 12 months ago
PMD Global Transmit Disable bit should be cleared for normal operation.
This should be HW default, however I found that on Asus RT-AX89X that uses
AQR113C PHY and firmware 5.4 this bit is set by default.

With this bit set the AQR cannot achieve a link with its link-partner and
it took me multiple hours of digging through the vendor GPL source to find
this out, so lets always clear this bit during .config_init() to avoid a
situation like this in the future.

Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 drivers/net/phy/aquantia/aquantia_main.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c
index 97a2fafa15ca..e1f092cbfdce 100644
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -727,6 +727,15 @@ static int aqr113c_config_init(struct phy_device *phydev)
 	if (ret < 0)
 		return ret;
 
+	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS,
+				 MDIO_PMD_TXDIS_GLOBAL);
+	if (ret)
+		return ret;
+
+	ret = aqr107_wait_processor_intensive_op(phydev);
+	if (ret)
+		return ret;
+
 	return aqr107_fill_interface_modes(phydev);
 }
 
-- 
2.43.0
Re: [PATCH net-next] net: phy: aquantia: clear PMD Global Transmit Disable bit during init
Posted by Andrew Lunn 1 year, 12 months ago
On Sun, Feb 11, 2024 at 07:16:41PM +0100, Robert Marko wrote:
> PMD Global Transmit Disable bit should be cleared for normal operation.
> This should be HW default, however I found that on Asus RT-AX89X that uses
> AQR113C PHY and firmware 5.4 this bit is set by default.
> 
> With this bit set the AQR cannot achieve a link with its link-partner and
> it took me multiple hours of digging through the vendor GPL source to find
> this out, so lets always clear this bit during .config_init() to avoid a
> situation like this in the future.

This all look sensible. My only question is, should we have core c45
code doing this?

[Goes and looks at 802.3]

O.K, so the Marvell PHY firmware appears to be broken. The standard
says it should have a default value of 0, i.e. the transmitter should
be enabled by default. So this is just a workaround for broken
behaviour.

> Signed-off-by: Robert Marko <robimarko@gmail.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew