1. Patchew
  2. linux
  3. [PATCH 0/2] arm64: dts: ti: am62: Add USB support for k3-am62p
  4. View patch

[PATCH 1/2] arm64: dts: ti: k3-am62/a/p: use sub-node for USB_PHY_CTRL registers

Roger Quadros posted 2 patches 1 year, 11 months ago
There is a newer version of this series
[PATCH 1/2] arm64: dts: ti: k3-am62/a/p: use sub-node for USB_PHY_CTRL registers
Posted by Roger Quadros 1 year, 11 months ago 
Exposing the entire CTRL_MMR space to syscon is not a good idea.
Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them
in the USB0/USB1 nodes.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi    |  4 ++--
 arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi  | 10 ++++++++++
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi   |  4 ++--
 arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++
 arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 ++++++++++
 5 files changed, 34 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 464b7565d085..9432ed344d52 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -625,7 +625,7 @@ usbss0: dwc3-usb@f900000 {
 		reg = <0x00 0x0f900000 0x00 0x800>;
 		clocks = <&k3_clks 161 3>;
 		clock-names = "ref";
-		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+		ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
 		#address-cells = <2>;
 		#size-cells = <2>;
 		power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -648,7 +648,7 @@ usbss1: dwc3-usb@f910000 {
 		reg = <0x00 0x0f910000 0x00 0x800>;
 		clocks = <&k3_clks 162 3>;
 		clock-names = "ref";
-		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+		ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
 		#address-cells = <2>;
 		#size-cells = <2>;
 		power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
index fef76f52a52e..bd09662a3c29 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
@@ -19,6 +19,16 @@ chipid: chipid@14 {
 			compatible = "ti,am654-chipid";
 			reg = <0x14 0x4>;
 		};
+
+		usb0_phy_ctrl: syscon@4008 {
+			compatible = "syscon";
+			reg = <0x4008 0x4>;
+		};
+
+		usb1_phy_ctrl: syscon@4018 {
+			compatible = "syscon";
+			reg = <0x4018 0x4>;
+		};
 	};
 
 	wkup_uart0: serial@2b300000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index f0b8c9ab1459..8311c7c44cd3 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -566,7 +566,7 @@ usbss0: dwc3-usb@f900000 {
 		reg = <0x00 0x0f900000 0x00 0x800>;
 		clocks = <&k3_clks 161 3>;
 		clock-names = "ref";
-		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+		ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
 		#address-cells = <2>;
 		#size-cells = <2>;
 		power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -589,7 +589,7 @@ usbss1: dwc3-usb@f910000 {
 		reg = <0x00 0x0f910000 0x00 0x800>;
 		clocks = <&k3_clks 162 3>;
 		clock-names = "ref";
-		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+		ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
 		#address-cells = <2>;
 		#size-cells = <2>;
 		power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index 4e8279fa01e1..26e9fd9da78f 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -17,6 +17,16 @@ chipid: chipid@14 {
 			compatible = "ti,am654-chipid";
 			reg = <0x14 0x4>;
 		};
+
+		usb0_phy_ctrl: syscon@4008 {
+			compatible = "syscon";
+			reg = <0x4008 0x4>;
+		};
+
+		usb1_phy_ctrl: syscon@4018 {
+			compatible = "syscon";
+			reg = <0x4018 0x4>;
+		};
 	};
 
 	wkup_uart0: serial@2b300000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
index 19f42b39394e..0893e63c399a 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
@@ -18,6 +18,16 @@ chipid: chipid@14 {
 			reg = <0x14 0x4>;
 			bootph-all;
 		};
+
+		usb0_phy_ctrl: syscon@4008 {
+			compatible = "syscon";
+			reg = <0x4008 0x4>;
+		};
+
+		usb1_phy_ctrl: syscon@4018 {
+			compatible = "syscon";
+			reg = <0x4018 0x4>;
+		};
 	};
 
 	wkup_uart0: serial@2b300000 {
-- 
2.34.1
Re: [PATCH 1/2] arm64: dts: ti: k3-am62/a/p: use sub-node for USB_PHY_CTRL registers
Posted by Krzysztof Kozlowski 1 year, 11 months ago 
On 26/01/2024 13:59, Roger Quadros wrote:
>  		power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
> @@ -648,7 +648,7 @@ usbss1: dwc3-usb@f910000 {
>  		reg = <0x00 0x0f910000 0x00 0x800>;
>  		clocks = <&k3_clks 162 3>;
>  		clock-names = "ref";
> -		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
> +		ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>  		#address-cells = <2>;
>  		#size-cells = <2>;
>  		power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> index fef76f52a52e..bd09662a3c29 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> @@ -19,6 +19,16 @@ chipid: chipid@14 {
>  			compatible = "ti,am654-chipid";
>  			reg = <0x14 0x4>;
>  		};
> +
> +		usb0_phy_ctrl: syscon@4008 {
> +			compatible = "syscon";

Not allowed alone and should cause warnings.

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

Best regards,
Krzysztof
Re: [PATCH 1/2] arm64: dts: ti: k3-am62/a/p: use sub-node for USB_PHY_CTRL registers
Posted by Andrew Davis 1 year, 11 months ago 
On 1/26/24 6:59 AM, Roger Quadros wrote:
> Exposing the entire CTRL_MMR space to syscon is not a good idea.
> Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them
> in the USB0/USB1 nodes.
> 
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> ---
>   arch/arm64/boot/dts/ti/k3-am62-main.dtsi    |  4 ++--
>   arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi  | 10 ++++++++++
>   arch/arm64/boot/dts/ti/k3-am62a-main.dtsi   |  4 ++--
>   arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++
>   arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 ++++++++++
>   5 files changed, 34 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index 464b7565d085..9432ed344d52 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -625,7 +625,7 @@ usbss0: dwc3-usb@f900000 {
>   		reg = <0x00 0x0f900000 0x00 0x800>;
>   		clocks = <&k3_clks 161 3>;
>   		clock-names = "ref";
> -		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
> +		ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
>   		#address-cells = <2>;
>   		#size-cells = <2>;
>   		power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
> @@ -648,7 +648,7 @@ usbss1: dwc3-usb@f910000 {
>   		reg = <0x00 0x0f910000 0x00 0x800>;
>   		clocks = <&k3_clks 162 3>;
>   		clock-names = "ref";
> -		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
> +		ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>   		#address-cells = <2>;
>   		#size-cells = <2>;
>   		power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> index fef76f52a52e..bd09662a3c29 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
> @@ -19,6 +19,16 @@ chipid: chipid@14 {
>   			compatible = "ti,am654-chipid";
>   			reg = <0x14 0x4>;
>   		};
> +
> +		usb0_phy_ctrl: syscon@4008 {
> +			compatible = "syscon";

You'll want to add a binding for this to the simple syscon list.
See this patch for an example[0]. Otherwise this gives a DT check
warning.

Also, adding the new nodes for AM62p should be moved to the
next patch in this series. Fixing AM62 and AM62a should be
a standalone patch.

Andrew

[0] commit cb523495ee2a ("dt-bindings: mfd: syscon: Add ti,am654-dss-oldi-io-ctrl compatible")

> +			reg = <0x4008 0x4>;
> +		};
> +
> +		usb1_phy_ctrl: syscon@4018 {
> +			compatible = "syscon";
> +			reg = <0x4018 0x4>;
> +		};
>   	};
>   
>   	wkup_uart0: serial@2b300000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> index f0b8c9ab1459..8311c7c44cd3 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> @@ -566,7 +566,7 @@ usbss0: dwc3-usb@f900000 {
>   		reg = <0x00 0x0f900000 0x00 0x800>;
>   		clocks = <&k3_clks 161 3>;
>   		clock-names = "ref";
> -		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
> +		ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
>   		#address-cells = <2>;
>   		#size-cells = <2>;
>   		power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
> @@ -589,7 +589,7 @@ usbss1: dwc3-usb@f910000 {
>   		reg = <0x00 0x0f910000 0x00 0x800>;
>   		clocks = <&k3_clks 162 3>;
>   		clock-names = "ref";
> -		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
> +		ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>   		#address-cells = <2>;
>   		#size-cells = <2>;
>   		power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> index 4e8279fa01e1..26e9fd9da78f 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> @@ -17,6 +17,16 @@ chipid: chipid@14 {
>   			compatible = "ti,am654-chipid";
>   			reg = <0x14 0x4>;
>   		};
> +
> +		usb0_phy_ctrl: syscon@4008 {
> +			compatible = "syscon";
> +			reg = <0x4008 0x4>;
> +		};
> +
> +		usb1_phy_ctrl: syscon@4018 {
> +			compatible = "syscon";
> +			reg = <0x4018 0x4>;
> +		};
>   	};
>   
>   	wkup_uart0: serial@2b300000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
> index 19f42b39394e..0893e63c399a 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
> @@ -18,6 +18,16 @@ chipid: chipid@14 {
>   			reg = <0x14 0x4>;
>   			bootph-all;
>   		};
> +
> +		usb0_phy_ctrl: syscon@4008 {
> +			compatible = "syscon";
> +			reg = <0x4008 0x4>;
> +		};
> +
> +		usb1_phy_ctrl: syscon@4018 {
> +			compatible = "syscon";
> +			reg = <0x4018 0x4>;
> +		};
>   	};
>   
>   	wkup_uart0: serial@2b300000 {
Re: [PATCH 1/2] arm64: dts: ti: k3-am62/a/p: use sub-node for USB_PHY_CTRL registers
Posted by Roger Quadros 1 year, 10 months ago 

On 26/01/2024 17:00, Andrew Davis wrote:
> On 1/26/24 6:59 AM, Roger Quadros wrote:
>> Exposing the entire CTRL_MMR space to syscon is not a good idea.
>> Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them
>> in the USB0/USB1 nodes.
>>
>> Signed-off-by: Roger Quadros <rogerq@kernel.org>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am62-main.dtsi    |  4 ++--
>>   arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi  | 10 ++++++++++
>>   arch/arm64/boot/dts/ti/k3-am62a-main.dtsi   |  4 ++--
>>   arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++
>>   arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 ++++++++++
>>   5 files changed, 34 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> index 464b7565d085..9432ed344d52 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> @@ -625,7 +625,7 @@ usbss0: dwc3-usb@f900000 {
>>           reg = <0x00 0x0f900000 0x00 0x800>;
>>           clocks = <&k3_clks 161 3>;
>>           clock-names = "ref";
>> -        ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
>> +        ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
>>           #address-cells = <2>;
>>           #size-cells = <2>;
>>           power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
>> @@ -648,7 +648,7 @@ usbss1: dwc3-usb@f910000 {
>>           reg = <0x00 0x0f910000 0x00 0x800>;
>>           clocks = <&k3_clks 162 3>;
>>           clock-names = "ref";
>> -        ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
>> +        ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>>           #address-cells = <2>;
>>           #size-cells = <2>;
>>           power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
>> index fef76f52a52e..bd09662a3c29 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
>> @@ -19,6 +19,16 @@ chipid: chipid@14 {
>>               compatible = "ti,am654-chipid";
>>               reg = <0x14 0x4>;
>>           };
>> +
>> +        usb0_phy_ctrl: syscon@4008 {
>> +            compatible = "syscon";
> 
> You'll want to add a binding for this to the simple syscon list.
> See this patch for an example[0]. Otherwise this gives a DT check
> warning.

Thanks for the hint. Will fix.

> 
> Also, adding the new nodes for AM62p should be moved to the
> next patch in this series. Fixing AM62 and AM62a should be
> a standalone patch.

Agreed.

> 
> Andrew
> 
> [0] commit cb523495ee2a ("dt-bindings: mfd: syscon: Add ti,am654-dss-oldi-io-ctrl compatible")
> 
>> +            reg = <0x4008 0x4>;
>> +        };
>> +
>> +        usb1_phy_ctrl: syscon@4018 {
>> +            compatible = "syscon";
>> +            reg = <0x4018 0x4>;
>> +        };
>>       };
>>         wkup_uart0: serial@2b300000 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
>> index f0b8c9ab1459..8311c7c44cd3 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
>> @@ -566,7 +566,7 @@ usbss0: dwc3-usb@f900000 {
>>           reg = <0x00 0x0f900000 0x00 0x800>;
>>           clocks = <&k3_clks 161 3>;
>>           clock-names = "ref";
>> -        ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
>> +        ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
>>           #address-cells = <2>;
>>           #size-cells = <2>;
>>           power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
>> @@ -589,7 +589,7 @@ usbss1: dwc3-usb@f910000 {
>>           reg = <0x00 0x0f910000 0x00 0x800>;
>>           clocks = <&k3_clks 162 3>;
>>           clock-names = "ref";
>> -        ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
>> +        ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>>           #address-cells = <2>;
>>           #size-cells = <2>;
>>           power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
>> index 4e8279fa01e1..26e9fd9da78f 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
>> @@ -17,6 +17,16 @@ chipid: chipid@14 {
>>               compatible = "ti,am654-chipid";
>>               reg = <0x14 0x4>;
>>           };
>> +
>> +        usb0_phy_ctrl: syscon@4008 {
>> +            compatible = "syscon";
>> +            reg = <0x4008 0x4>;
>> +        };
>> +
>> +        usb1_phy_ctrl: syscon@4018 {
>> +            compatible = "syscon";
>> +            reg = <0x4018 0x4>;
>> +        };
>>       };
>>         wkup_uart0: serial@2b300000 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>> index 19f42b39394e..0893e63c399a 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>> @@ -18,6 +18,16 @@ chipid: chipid@14 {
>>               reg = <0x14 0x4>;
>>               bootph-all;
>>           };
>> +
>> +        usb0_phy_ctrl: syscon@4008 {
>> +            compatible = "syscon";
>> +            reg = <0x4008 0x4>;
>> +        };
>> +
>> +        usb1_phy_ctrl: syscon@4018 {
>> +            compatible = "syscon";
>> +            reg = <0x4018 0x4>;
>> +        };
>>       };
>>         wkup_uart0: serial@2b300000 {

-- 
cheers,
-roger

Patchew 2.1-devel-b67e4c2

© 2016 - 2025 Red Hat, Inc.