From: Yury Norov <yury.norov@gmail.com>
Generalize __GENMASK() to support different types, and implement
fixed-types versions of GENMASK() based on it. The fixed-type version
allows more strict checks to the min/max values accepted, which is
useful for defining registers like implemented by i915 and xe drivers
with their REG_GENMASK*() macros.
Signed-off-by: Yury Norov <yury.norov@gmail.com>
---
include/linux/bitops.h | 1 -
include/linux/bits.h | 22 ++++++++++++----------
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 2ba557e067fe..1db50c69cfdb 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -15,7 +15,6 @@
# define aligned_byte_mask(n) (~0xffUL << (BITS_PER_LONG - 8 - 8*(n)))
#endif
-#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE)
#define BITS_TO_LONGS(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(long))
#define BITS_TO_U64(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u64))
#define BITS_TO_U32(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u32))
diff --git a/include/linux/bits.h b/include/linux/bits.h
index 7c0cf5031abe..cb94128171b2 100644
--- a/include/linux/bits.h
+++ b/include/linux/bits.h
@@ -6,6 +6,8 @@
#include <vdso/bits.h>
#include <asm/bitsperlong.h>
+#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE)
+
#define BIT_MASK(nr) (UL(1) << ((nr) % BITS_PER_LONG))
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
#define BIT_ULL_MASK(nr) (ULL(1) << ((nr) % BITS_PER_LONG_LONG))
@@ -30,16 +32,16 @@
#define GENMASK_INPUT_CHECK(h, l) 0
#endif
-#define __GENMASK(h, l) \
- (((~UL(0)) - (UL(1) << (l)) + 1) & \
- (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
-#define GENMASK(h, l) \
- (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
+#define __GENMASK(t, h, l) \
+ (GENMASK_INPUT_CHECK(h, l) + \
+ (((t)~0ULL - ((t)(1) << (l)) + 1) & \
+ ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
-#define __GENMASK_ULL(h, l) \
- (((~ULL(0)) - (ULL(1) << (l)) + 1) & \
- (~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h))))
-#define GENMASK_ULL(h, l) \
- (GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l))
+#define GENMASK(h, l) __GENMASK(unsigned long, h, l)
+#define GENMASK_ULL(h, l) __GENMASK(unsigned long long, h, l)
+#define GENMASK_U8(h, l) __GENMASK(u8, h, l)
+#define GENMASK_U16(h, l) __GENMASK(u16, h, l)
+#define GENMASK_U32(h, l) __GENMASK(u32, h, l)
+#define GENMASK_U64(h, l) __GENMASK(u64, h, l)
#endif /* __LINUX_BITS_H */
--
2.43.0On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@intel.com> wrote: > From: Yury Norov <yury.norov@gmail.com> > > Generalize __GENMASK() to support different types, and implement > fixed-types versions of GENMASK() based on it. The fixed-type version > allows more strict checks to the min/max values accepted, which is > useful for defining registers like implemented by i915 and xe drivers > with their REG_GENMASK*() macros. Mmh, the commit message says the fixed-type version allows more strict checks, but none are actually added. GENMASK_INPUT_CHECK() remains the same. Compared to the i915 and xe versions, this is more lax now. You could specify GENMASK_U32(63,32) without complaints. BR, Jani. > > Signed-off-by: Yury Norov <yury.norov@gmail.com> > --- > include/linux/bitops.h | 1 - > include/linux/bits.h | 22 ++++++++++++---------- > 2 files changed, 12 insertions(+), 11 deletions(-) > > diff --git a/include/linux/bitops.h b/include/linux/bitops.h > index 2ba557e067fe..1db50c69cfdb 100644 > --- a/include/linux/bitops.h > +++ b/include/linux/bitops.h > @@ -15,7 +15,6 @@ > # define aligned_byte_mask(n) (~0xffUL << (BITS_PER_LONG - 8 - 8*(n))) > #endif > > -#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) > #define BITS_TO_LONGS(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(long)) > #define BITS_TO_U64(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u64)) > #define BITS_TO_U32(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u32)) > diff --git a/include/linux/bits.h b/include/linux/bits.h > index 7c0cf5031abe..cb94128171b2 100644 > --- a/include/linux/bits.h > +++ b/include/linux/bits.h > @@ -6,6 +6,8 @@ > #include <vdso/bits.h> > #include <asm/bitsperlong.h> > > +#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) > + > #define BIT_MASK(nr) (UL(1) << ((nr) % BITS_PER_LONG)) > #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) > #define BIT_ULL_MASK(nr) (ULL(1) << ((nr) % BITS_PER_LONG_LONG)) > @@ -30,16 +32,16 @@ > #define GENMASK_INPUT_CHECK(h, l) 0 > #endif > > -#define __GENMASK(h, l) \ > - (((~UL(0)) - (UL(1) << (l)) + 1) & \ > - (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) > -#define GENMASK(h, l) \ > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) > +#define __GENMASK(t, h, l) \ > + (GENMASK_INPUT_CHECK(h, l) + \ > + (((t)~0ULL - ((t)(1) << (l)) + 1) & \ > + ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h))))) > > -#define __GENMASK_ULL(h, l) \ > - (((~ULL(0)) - (ULL(1) << (l)) + 1) & \ > - (~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h)))) > -#define GENMASK_ULL(h, l) \ > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l)) > +#define GENMASK(h, l) __GENMASK(unsigned long, h, l) > +#define GENMASK_ULL(h, l) __GENMASK(unsigned long long, h, l) > +#define GENMASK_U8(h, l) __GENMASK(u8, h, l) > +#define GENMASK_U16(h, l) __GENMASK(u16, h, l) > +#define GENMASK_U32(h, l) __GENMASK(u32, h, l) > +#define GENMASK_U64(h, l) __GENMASK(u64, h, l) > > #endif /* __LINUX_BITS_H */ -- Jani Nikula, Intel
On Wed, Jan 24, 2024 at 09:58:26AM +0200, Jani Nikula wrote:
>On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
>> From: Yury Norov <yury.norov@gmail.com>
>>
>> Generalize __GENMASK() to support different types, and implement
>> fixed-types versions of GENMASK() based on it. The fixed-type version
>> allows more strict checks to the min/max values accepted, which is
>> useful for defining registers like implemented by i915 and xe drivers
>> with their REG_GENMASK*() macros.
>
>Mmh, the commit message says the fixed-type version allows more strict
>checks, but none are actually added. GENMASK_INPUT_CHECK() remains the
>same.
>
>Compared to the i915 and xe versions, this is more lax now. You could
>specify GENMASK_U32(63,32) without complaints.
Doing this on top of the this series:
-#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27)
+#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(62, 32)
and I do get a build failure:
../drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function ‘__intel_cx0_read_once’:
../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow]
41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \
| ^~
I also tested them individually. All of these fail to build for me:
1)
-#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27)
+#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(32, 27)
2)
-#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27)
+#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 31)
3)
-#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27)
+#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, -1)
Lucas De Marchi
On Wed, Jan 24, 2024 at 08:03:53AM -0600, Lucas De Marchi wrote: > On Wed, Jan 24, 2024 at 09:58:26AM +0200, Jani Nikula wrote: > > On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@intel.com> wrote: > > > From: Yury Norov <yury.norov@gmail.com> > > > > > > Generalize __GENMASK() to support different types, and implement > > > fixed-types versions of GENMASK() based on it. The fixed-type version > > > allows more strict checks to the min/max values accepted, which is > > > useful for defining registers like implemented by i915 and xe drivers > > > with their REG_GENMASK*() macros. > > > > Mmh, the commit message says the fixed-type version allows more strict > > checks, but none are actually added. GENMASK_INPUT_CHECK() remains the > > same. > > > > Compared to the i915 and xe versions, this is more lax now. You could > > specify GENMASK_U32(63,32) without complaints. > > Doing this on top of the this series: > > -#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27) > +#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(62, 32) > > and I do get a build failure: > > ../drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function ‘__intel_cx0_read_once’: > ../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow] > 41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \ > | ^~ I would better include this in commit message to avoid people's confusion. If it comes to v2, can you please do it and mention that this trick relies on shift-count-overflow compiler check? Thanks, Yury
On Wed, Jan 24, 2024 at 07:27:58AM -0800, Yury Norov wrote: >On Wed, Jan 24, 2024 at 08:03:53AM -0600, Lucas De Marchi wrote: >> On Wed, Jan 24, 2024 at 09:58:26AM +0200, Jani Nikula wrote: >> > On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@intel.com> wrote: >> > > From: Yury Norov <yury.norov@gmail.com> >> > > >> > > Generalize __GENMASK() to support different types, and implement >> > > fixed-types versions of GENMASK() based on it. The fixed-type version >> > > allows more strict checks to the min/max values accepted, which is >> > > useful for defining registers like implemented by i915 and xe drivers >> > > with their REG_GENMASK*() macros. >> > >> > Mmh, the commit message says the fixed-type version allows more strict >> > checks, but none are actually added. GENMASK_INPUT_CHECK() remains the >> > same. >> > >> > Compared to the i915 and xe versions, this is more lax now. You could >> > specify GENMASK_U32(63,32) without complaints. >> >> Doing this on top of the this series: >> >> -#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27) >> +#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(62, 32) >> >> and I do get a build failure: >> >> ../drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function ‘__intel_cx0_read_once’: >> ../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow] >> 41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \ >> | ^~ > >I would better include this in commit message to avoid people's >confusion. If it comes to v2, can you please do it and mention that >this trick relies on shift-count-overflow compiler check? either that or an explicit check as it was suggested. What's your preference? Lucas De Marchi > >Thanks, >Yury
On Mon, Jan 29, 2024 at 08:49:35AM -0600, Lucas De Marchi wrote:
> On Wed, Jan 24, 2024 at 07:27:58AM -0800, Yury Norov wrote:
> > On Wed, Jan 24, 2024 at 08:03:53AM -0600, Lucas De Marchi wrote:
> > > On Wed, Jan 24, 2024 at 09:58:26AM +0200, Jani Nikula wrote:
> > > > On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> > > > > From: Yury Norov <yury.norov@gmail.com>
> > > > >
> > > > > Generalize __GENMASK() to support different types, and implement
> > > > > fixed-types versions of GENMASK() based on it. The fixed-type version
> > > > > allows more strict checks to the min/max values accepted, which is
> > > > > useful for defining registers like implemented by i915 and xe drivers
> > > > > with their REG_GENMASK*() macros.
> > > >
> > > > Mmh, the commit message says the fixed-type version allows more strict
> > > > checks, but none are actually added. GENMASK_INPUT_CHECK() remains the
> > > > same.
> > > >
> > > > Compared to the i915 and xe versions, this is more lax now. You could
> > > > specify GENMASK_U32(63,32) without complaints.
> > >
> > > Doing this on top of the this series:
> > >
> > > -#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27)
> > > +#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(62, 32)
> > >
> > > and I do get a build failure:
> > >
> > > ../drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function ‘__intel_cx0_read_once’:
> > > ../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow]
> > > 41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \
> > > | ^~
> >
> > I would better include this in commit message to avoid people's
> > confusion. If it comes to v2, can you please do it and mention that
> > this trick relies on shift-count-overflow compiler check?
>
> either that or an explicit check as it was suggested. What's your
> preference?
Let's put a comment in the code. An argument that shift-count-overflow
may be disabled sounds more like a speculation unless we have a solid
example of a build system where the error is disabled for a good sane
reason, but possible GENMASK() overflow is still considered dangerous.
GENMASK() is all about bit shifts, so shift-related error is something
I'd expect when using GENMASK().
Also, the macro is widely used in the kernel:
yury:linux$ git grep GENMASK | wc -l
26879
Explicit check would add pressure on the compiler for nothing.
Thanks,
Yury
Quoting Yury Norov (2024-01-24 12:27:58-03:00) >On Wed, Jan 24, 2024 at 08:03:53AM -0600, Lucas De Marchi wrote: >> On Wed, Jan 24, 2024 at 09:58:26AM +0200, Jani Nikula wrote: >> > On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@intel.com> wrote: >> > > From: Yury Norov <yury.norov@gmail.com> >> > > >> > > Generalize __GENMASK() to support different types, and implement >> > > fixed-types versions of GENMASK() based on it. The fixed-type version >> > > allows more strict checks to the min/max values accepted, which is >> > > useful for defining registers like implemented by i915 and xe drivers >> > > with their REG_GENMASK*() macros. >> > >> > Mmh, the commit message says the fixed-type version allows more strict >> > checks, but none are actually added. GENMASK_INPUT_CHECK() remains the >> > same. >> > >> > Compared to the i915 and xe versions, this is more lax now. You could >> > specify GENMASK_U32(63,32) without complaints. >> >> Doing this on top of the this series: >> >> -#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27) >> +#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(62, 32) >> >> and I do get a build failure: >> >> ../drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function ‘__intel_cx0_read_once’: >> ../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow] >> 41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \ >> | ^~ > >I would better include this in commit message to avoid people's >confusion. If it comes to v2, can you please do it and mention that >this trick relies on shift-count-overflow compiler check? Wouldn't it be better to have explicit check that l and h are not out of bounds based on BITS_PER_TYPE() than relying on a compiler flag that could be turned off (maybe for some questionable reason, but even so)? -- Gustavo Sousa
On Wed, 24 Jan 2024, Gustavo Sousa <gustavo.sousa@intel.com> wrote: > Quoting Yury Norov (2024-01-24 12:27:58-03:00) >>On Wed, Jan 24, 2024 at 08:03:53AM -0600, Lucas De Marchi wrote: >>> On Wed, Jan 24, 2024 at 09:58:26AM +0200, Jani Nikula wrote: >>> > On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@intel.com> wrote: >>> > > From: Yury Norov <yury.norov@gmail.com> >>> > > >>> > > Generalize __GENMASK() to support different types, and implement >>> > > fixed-types versions of GENMASK() based on it. The fixed-type version >>> > > allows more strict checks to the min/max values accepted, which is >>> > > useful for defining registers like implemented by i915 and xe drivers >>> > > with their REG_GENMASK*() macros. >>> > >>> > Mmh, the commit message says the fixed-type version allows more strict >>> > checks, but none are actually added. GENMASK_INPUT_CHECK() remains the >>> > same. >>> > >>> > Compared to the i915 and xe versions, this is more lax now. You could >>> > specify GENMASK_U32(63,32) without complaints. >>> >>> Doing this on top of the this series: >>> >>> -#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27) >>> +#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(62, 32) >>> >>> and I do get a build failure: >>> >>> ../drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function ‘__intel_cx0_read_once’: >>> ../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow] >>> 41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \ >>> | ^~ I stand corrected. >> >>I would better include this in commit message to avoid people's >>confusion. If it comes to v2, can you please do it and mention that >>this trick relies on shift-count-overflow compiler check? > > Wouldn't it be better to have explicit check that l and h are not out of bounds > based on BITS_PER_TYPE() than relying on a compiler flag that could be turned > off (maybe for some questionable reason, but even so)? My preference would be the explicit check, a comment in code, or an explanation in the commit message, in this order. Because honestly, none of this is obvious, and a future refactoring of GENMASK might just inadvertently thwart the whole check. Regardless, my main concern was moot, on the series, Acked-by: Jani Nikula <jani.nikula@intel.com> -- Jani Nikula, Intel
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