From: Elad Nachman <enachman@marvell.com>

This patch series adds device tree support for the Marvell AC5/X/IM
series of SOCs.
This is required due to bus limitation of 31-bit in this SOC family
plus the fact that the DDR memory starts at address 0x2_0000_0000 .

Elad Nachman (2):
  dt-bindings: mmc: add Marvell ac5
  arm64: dts: ac5: add mmc node and clock

 .../bindings/mmc/marvell,xenon-sdhci.yaml     |  4 ++-
 arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 31 ++++++++++++++++++-
 .../boot/dts/marvell/ac5-98dx35xx-rd.dts      |  4 +++
 3 files changed, 37 insertions(+), 2 deletions(-)

-- 
2.25.1