Add basic support for Unisoc's UMS9620, with this patch,
the board ums9620-2h10 can run into console.
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
---
arch/arm64/boot/dts/sprd/Makefile | 3 +-
arch/arm64/boot/dts/sprd/ums9620-2h10.dts | 38 ++++
arch/arm64/boot/dts/sprd/ums9620.dtsi | 247 ++++++++++++++++++++++
3 files changed, 287 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/sprd/ums9620-2h10.dts
create mode 100644 arch/arm64/boot/dts/sprd/ums9620.dtsi
diff --git a/arch/arm64/boot/dts/sprd/Makefile b/arch/arm64/boot/dts/sprd/Makefile
index 97522fb0bf66..3ce81ad7116f 100644
--- a/arch/arm64/boot/dts/sprd/Makefile
+++ b/arch/arm64/boot/dts/sprd/Makefile
@@ -2,4 +2,5 @@
dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb \
sp9860g-1h10.dtb \
sp9863a-1h10.dtb \
- ums512-1h10.dtb
+ ums512-1h10.dtb \
+ ums9620-2h10.dtb
diff --git a/arch/arm64/boot/dts/sprd/ums9620-2h10.dts b/arch/arm64/boot/dts/sprd/ums9620-2h10.dts
new file mode 100644
index 000000000000..b35671192a72
--- /dev/null
+++ b/arch/arm64/boot/dts/sprd/ums9620-2h10.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Unisoc UMS9620-2h10 board DTS file
+ *
+ * Copyright (C) 2023, Unisoc Inc.
+ */
+
+/dts-v1/;
+
+#include "ums9620.dtsi"
+
+/ {
+ model = "Unisoc UMS9620-2H10 Board";
+
+ compatible = "sprd,ums9620-2h10", "sprd,ums9620";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x2 0x00000000>;
+ };
+
+ chosen {
+ stdout-path = "serial1:921600n8";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/sprd/ums9620.dtsi b/arch/arm64/boot/dts/sprd/ums9620.dtsi
new file mode 100644
index 000000000000..c63019b2fe51
--- /dev/null
+++ b/arch/arm64/boot/dts/sprd/ums9620.dtsi
@@ -0,0 +1,247 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Unisoc UMS9620 DTS file
+ *
+ * Copyright (C) 2023, Unisoc Inc.
+ */
+
+#include <dt-bindings/clock/sprd,ums9620-clk.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&CPU0>;
+ };
+ core1 {
+ cpu = <&CPU1>;
+ };
+ core2 {
+ cpu = <&CPU2>;
+ };
+ core3 {
+ cpu = <&CPU3>;
+ };
+ core4 {
+ cpu = <&CPU4>;
+ };
+ core5 {
+ cpu = <&CPU5>;
+ };
+ core6 {
+ cpu = <&CPU6>;
+ };
+ core7 {
+ cpu = <&CPU7>;
+ };
+ };
+ };
+
+ CPU0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ cpu-idle-states = <&LIT_CORE_PD>;
+ };
+
+ CPU1: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ cpu-idle-states = <&LIT_CORE_PD>;
+ };
+
+ CPU2: cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x200>;
+ enable-method = "psci";
+ cpu-idle-states = <&LIT_CORE_PD>;
+ };
+
+ CPU3: cpu@300 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x300>;
+ enable-method = "psci";
+ cpu-idle-states = <&LIT_CORE_PD>;
+ };
+
+ CPU4: cpu@400 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a76";
+ reg = <0x0 0x400>;
+ enable-method = "psci";
+ cpu-idle-states = <&BIG_CORE_PD>;
+ };
+
+ CPU5: cpu@500 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a76";
+ reg = <0x0 0x500>;
+ enable-method = "psci";
+ cpu-idle-states = <&BIG_CORE_PD>;
+ };
+
+ CPU6: cpu@600 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a76";
+ reg = <0x0 0x600>;
+ enable-method = "psci";
+ cpu-idle-states = <&BIG_CORE_PD>;
+ };
+
+ CPU7: cpu@700 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a76";
+ reg = <0x0 0x700>;
+ enable-method = "psci";
+ cpu-idle-states = <&BIG_CORE_PD>;
+ };
+ };
+
+ idle-states {
+ entry-method = "psci";
+ LIT_CORE_PD: cpu-pd-lit {
+ compatible = "arm,idle-state";
+ entry-latency-us = <1000>;
+ exit-latency-us = <500>;
+ min-residency-us = <2500>;
+ local-timer-stop;
+ arm,psci-suspend-param = <0x00010000>;
+ };
+
+ BIG_CORE_PD: cpu-pd-big {
+ compatible = "arm,idle-state";
+ entry-latency-us = <4000>;
+ exit-latency-us = <4000>;
+ min-residency-us = <10000>;
+ local-timer-stop;
+ arm,psci-suspend-param = <0x00010000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, /* Physical Secure PPI */
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, /* Physical Non-Secure PPI */
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, /* Virtual PPI */
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; /* Hipervisor PPI */
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ soc: soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller@12000000 {
+ compatible = "arm,gic-v3";
+ reg = <0x0 0x12000000 0 0x20000>, /* GICD */
+ <0x0 0x12040000 0 0x100000>; /* GICR */
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ redistributor-stride = <0x0 0x20000>; /* 128KB stride */
+ #redistributor-regions = <1>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ apb@20200000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x20200000 0x100000>;
+
+ uart0: serial@0 {
+ compatible = "sprd,ums9620-uart",
+ "sprd,sc9836-uart";
+ reg = <0 0x100>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ext_26m>;
+ status = "disabled";
+ };
+
+ uart1: serial@10000 {
+ compatible = "sprd,ums9620-uart",
+ "sprd,sc9836-uart";
+ reg = <0x10000 0x100>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ext_26m>;
+ status = "disabled";
+ };
+ };
+ };
+
+ ext_26m: clk-26m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ clock-output-names = "ext-26m";
+ };
+
+ ext_4m: clk-4m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <4000000>;
+ clock-output-names = "ext-4m";
+ };
+
+ ext_32k: clk-32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "ext-32k";
+ };
+
+ rco_100m: clk-100m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "rco-100m";
+ };
+
+ dphy_312m5: dphy-312m5 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <312500000>;
+ clock-output-names = "dphy-312m5";
+ };
+
+ dphy_416m7: dphy-416m7 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <416700000>;
+ clock-output-names = "dphy-416m7";
+ };
+};
--
2.41.0Hi Chunyan,
kernel test robot noticed the following build errors:
[auto build test ERROR on robh/for-next]
[also build test ERROR on lee-mfd/for-mfd-next tty/tty-next tty/tty-linus krzk/for-next krzk-mem-ctrl/for-next linus/master v6.7-rc5 next-20231215]
[cannot apply to tty/tty-testing lee-mfd/for-mfd-fixes]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Chunyan-Zhang/dt-bindings-mfd-sprd-Add-support-for-UMS9620/20231215-165956
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20231215085630.984892-5-chunyan.zhang%40unisoc.com
patch subject: [PATCH 4/4] arm64: dts: sprd: Add support for Unisoc's UMS9620
config: arm64-allyesconfig (https://download.01.org/0day-ci/archive/20231217/202312171120.HfHwFDeV-lkp@intel.com/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231217/202312171120.HfHwFDeV-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202312171120.HfHwFDeV-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from arch/arm64/boot/dts/sprd/ums9620-2h10.dts:10:
>> arch/arm64/boot/dts/sprd/ums9620.dtsi:8:10: fatal error: 'dt-bindings/clock/sprd,ums9620-clk.h' file not found
8 | #include <dt-bindings/clock/sprd,ums9620-clk.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
vim +8 arch/arm64/boot/dts/sprd/ums9620.dtsi
> 8 #include <dt-bindings/clock/sprd,ums9620-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Hi Chunyan,
kernel test robot noticed the following build errors:
[auto build test ERROR on robh/for-next]
[also build test ERROR on lee-mfd/for-mfd-next tty/tty-next tty/tty-linus krzk/for-next krzk-mem-ctrl/for-next linus/master v6.7-rc5 next-20231215]
[cannot apply to tty/tty-testing lee-mfd/for-mfd-fixes]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Chunyan-Zhang/dt-bindings-mfd-sprd-Add-support-for-UMS9620/20231215-165956
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20231215085630.984892-5-chunyan.zhang%40unisoc.com
patch subject: [PATCH 4/4] arm64: dts: sprd: Add support for Unisoc's UMS9620
config: arm64-defconfig (https://download.01.org/0day-ci/archive/20231216/202312161154.pVCPezKU-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231216/202312161154.pVCPezKU-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202312161154.pVCPezKU-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from arch/arm64/boot/dts/sprd/ums9620-2h10.dts:10:
>> arch/arm64/boot/dts/sprd/ums9620.dtsi:8:10: fatal error: dt-bindings/clock/sprd,ums9620-clk.h: No such file or directory
8 | #include <dt-bindings/clock/sprd,ums9620-clk.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
vim +8 arch/arm64/boot/dts/sprd/ums9620.dtsi
> 8 #include <dt-bindings/clock/sprd,ums9620-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
On 15/12/2023 09:56, Chunyan Zhang wrote:
> Add basic support for Unisoc's UMS9620, with this patch,
> the board ums9620-2h10 can run into console.
>
...
> +
> + soc: soc {
Are you sure you do not have here W=1 warnings?
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gic: interrupt-controller@12000000 {
> + compatible = "arm,gic-v3";
> + reg = <0x0 0x12000000 0 0x20000>, /* GICD */
> + <0x0 0x12040000 0 0x100000>; /* GICR */
> + #interrupt-cells = <3>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
Put ranges after reg, if they are needed. Are they needed, BTW?
> + redistributor-stride = <0x0 0x20000>; /* 128KB stride */
> + #redistributor-regions = <1>;
> + interrupt-controller;
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + apb@20200000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0x20200000 0x100000>;
ranges is after reg, which is after compatible, so here it is the second
property.
> +
> + uart0: serial@0 {
> + compatible = "sprd,ums9620-uart",
> + "sprd,sc9836-uart";
> + reg = <0 0x100>;
> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ext_26m>;
> + status = "disabled";
> + };
> +
> + uart1: serial@10000 {
> + compatible = "sprd,ums9620-uart",
> + "sprd,sc9836-uart";
> + reg = <0x10000 0x100>;
> + interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ext_26m>;
> + status = "disabled";
> + };
> + };
> + };
Best regards,
Krzysztof
On Fri, 15 Dec 2023 at 18:36, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 15/12/2023 09:56, Chunyan Zhang wrote:
> > Add basic support for Unisoc's UMS9620, with this patch,
> > the board ums9620-2h10 can run into console.
> >
>
> ...
>
> > +
> > + soc: soc {
>
> Are you sure you do not have here W=1 warnings?
Do you mean warnings generated by running "make W=1"? I tried just now
and didn't see warnings on this dts.
Thanks,
Chunyan
On 18/12/2023 03:31, Chunyan Zhang wrote:
> On Fri, 15 Dec 2023 at 18:36, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 15/12/2023 09:56, Chunyan Zhang wrote:
>>> Add basic support for Unisoc's UMS9620, with this patch,
>>> the board ums9620-2h10 can run into console.
>>>
>>
>> ...
>>
>>> +
>>> + soc: soc {
>>
>> Are you sure you do not have here W=1 warnings?
>
> Do you mean warnings generated by running "make W=1"? I tried just now
> and didn't see warnings on this dts.
No, I meant `dtbs_check W=1` or W=1 coming from dtc (dtbs).
Best regards,
Krzysztof
On Mon, 18 Dec 2023 at 15:00, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 18/12/2023 03:31, Chunyan Zhang wrote:
> > On Fri, 15 Dec 2023 at 18:36, Krzysztof Kozlowski
> > <krzysztof.kozlowski@linaro.org> wrote:
> >>
> >> On 15/12/2023 09:56, Chunyan Zhang wrote:
> >>> Add basic support for Unisoc's UMS9620, with this patch,
> >>> the board ums9620-2h10 can run into console.
> >>>
> >>
> >> ...
> >>
> >>> +
> >>> + soc: soc {
> >>
> >> Are you sure you do not have here W=1 warnings?
> >
> > Do you mean warnings generated by running "make W=1"? I tried just now
> > and didn't see warnings on this dts.
>
> No, I meant `dtbs_check W=1` or W=1 coming from dtc (dtbs).
Yes, I just run "make W=1 dtbs", also have tried `dtbs_check W=1`,
didn't see warnings on ums9620-2h10.dtb
On 18/12/2023 08:18, Chunyan Zhang wrote:
> On Mon, 18 Dec 2023 at 15:00, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 18/12/2023 03:31, Chunyan Zhang wrote:
>>> On Fri, 15 Dec 2023 at 18:36, Krzysztof Kozlowski
>>> <krzysztof.kozlowski@linaro.org> wrote:
>>>>
>>>> On 15/12/2023 09:56, Chunyan Zhang wrote:
>>>>> Add basic support for Unisoc's UMS9620, with this patch,
>>>>> the board ums9620-2h10 can run into console.
>>>>>
>>>>
>>>> ...
>>>>
>>>>> +
>>>>> + soc: soc {
>>>>
>>>> Are you sure you do not have here W=1 warnings?
>>>
>>> Do you mean warnings generated by running "make W=1"? I tried just now
>>> and didn't see warnings on this dts.
>>
>> No, I meant `dtbs_check W=1` or W=1 coming from dtc (dtbs).
>
> Yes, I just run "make W=1 dtbs", also have tried `dtbs_check W=1`,
> didn't see warnings on ums9620-2h10.dtb
Ah, because it does not even compile!
ums9620.dtsi:8:10: fatal error: dt-bindings/clock/sprd,ums9620-clk.h: No
such file or directory
Best regards,
Krzysztof
On Mon, 18 Dec 2023 at 15:31, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 18/12/2023 08:18, Chunyan Zhang wrote:
> > On Mon, 18 Dec 2023 at 15:00, Krzysztof Kozlowski
> > <krzysztof.kozlowski@linaro.org> wrote:
> >>
> >> On 18/12/2023 03:31, Chunyan Zhang wrote:
> >>> On Fri, 15 Dec 2023 at 18:36, Krzysztof Kozlowski
> >>> <krzysztof.kozlowski@linaro.org> wrote:
> >>>>
> >>>> On 15/12/2023 09:56, Chunyan Zhang wrote:
> >>>>> Add basic support for Unisoc's UMS9620, with this patch,
> >>>>> the board ums9620-2h10 can run into console.
> >>>>>
> >>>>
> >>>> ...
> >>>>
> >>>>> +
> >>>>> + soc: soc {
> >>>>
> >>>> Are you sure you do not have here W=1 warnings?
> >>>
> >>> Do you mean warnings generated by running "make W=1"? I tried just now
> >>> and didn't see warnings on this dts.
> >>
> >> No, I meant `dtbs_check W=1` or W=1 coming from dtc (dtbs).
> >
> > Yes, I just run "make W=1 dtbs", also have tried `dtbs_check W=1`,
> > didn't see warnings on ums9620-2h10.dtb
>
> Ah, because it does not even compile!
The patch was generated from a middle commit (that was my mistake of course).
But I've fixed the issue. I ran the command just now according to your
comments, and didn't see the warnings on this dtb.
If I'm missing something, please correct me.
Thanks,
Chunyan
On 18/12/2023 08:37, Chunyan Zhang wrote:
> On Mon, 18 Dec 2023 at 15:31, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 18/12/2023 08:18, Chunyan Zhang wrote:
>>> On Mon, 18 Dec 2023 at 15:00, Krzysztof Kozlowski
>>> <krzysztof.kozlowski@linaro.org> wrote:
>>>>
>>>> On 18/12/2023 03:31, Chunyan Zhang wrote:
>>>>> On Fri, 15 Dec 2023 at 18:36, Krzysztof Kozlowski
>>>>> <krzysztof.kozlowski@linaro.org> wrote:
>>>>>>
>>>>>> On 15/12/2023 09:56, Chunyan Zhang wrote:
>>>>>>> Add basic support for Unisoc's UMS9620, with this patch,
>>>>>>> the board ums9620-2h10 can run into console.
>>>>>>>
>>>>>>
>>>>>> ...
>>>>>>
>>>>>>> +
>>>>>>> + soc: soc {
>>>>>>
>>>>>> Are you sure you do not have here W=1 warnings?
>>>>>
>>>>> Do you mean warnings generated by running "make W=1"? I tried just now
>>>>> and didn't see warnings on this dts.
>>>>
>>>> No, I meant `dtbs_check W=1` or W=1 coming from dtc (dtbs).
>>>
>>> Yes, I just run "make W=1 dtbs", also have tried `dtbs_check W=1`,
>>> didn't see warnings on ums9620-2h10.dtb
>>
>> Ah, because it does not even compile!
>
> The patch was generated from a middle commit (that was my mistake of course).
>
> But I've fixed the issue. I ran the command just now according to your
> comments, and didn't see the warnings on this dtb.
>
> If I'm missing something, please correct me.
You don't have unit address for soc node, but could be fine if
address/size cells match. Don't remember, but also cannot verify because
it does not build. :(
Best regards,
Krzysztof
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