Two OPPs are currently defined for the D1/D1s; one at 408MHz and
another at 1.08GHz. Switching between these can be done with the
"sun50i-cpufreq-nvmem" driver. This patch populates the opp table
appropriately, with inspiration from
https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi
The supply voltages are PWM-controlled, but support for that IP
is still in the works. So stick to a fixed 0.9V vdd-cpu supply,
which seems to be the default on most D1 boards.
Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 64c3c2e6c..e211fe4c7 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller {
};
opp_table_cpu: opp-table-cpu {
- compatible = "operating-points-v2";
+ compatible = "allwinner,sun20i-d1-operating-points",
+ "allwinner,sun50i-h6-operating-points";
+ nvmem-cells = <&cpu_speed_grade>;
+ nvmem-cell-names = "speed";
+ opp-shared;
opp-408000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <900000 900000 1100000>;
+ opp-microvolt-speed0 = <900000>;
};
opp-1080000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <900000 900000 1100000>;
+ opp-microvolt-speed0 = <900000>;
};
};
@@ -115,3 +121,8 @@ pmu {
<0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>;
};
};
+
+&sid {
+ cpu_speed_grade: cpu-speed-grade@0 {
+ reg = <0x00 0x2>;
+ };
+};
--
2.30.2On 14-12-23, 11:33, Brandon Cheo Fusi wrote:
> Two OPPs are currently defined for the D1/D1s; one at 408MHz and
> another at 1.08GHz. Switching between these can be done with the
> "sun50i-cpufreq-nvmem" driver. This patch populates the opp table
> appropriately, with inspiration from
> https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi
>
> The supply voltages are PWM-controlled, but support for that IP
> is still in the works. So stick to a fixed 0.9V vdd-cpu supply,
> which seems to be the default on most D1 boards.
>
> Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
> ---
> arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> index 64c3c2e6c..e211fe4c7 100644
> --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> @@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller {
> };
>
> opp_table_cpu: opp-table-cpu {
> - compatible = "operating-points-v2";
> + compatible = "allwinner,sun20i-d1-operating-points",
I don't think you should add a new compatible for every SoC that needs
to be supported by a DT bindings and cpufreq driver. Maybe you should
just reuse "allwinner,sun50i-h6-operating-points" and it will work
fine for you ?
Rob ?
> + "allwinner,sun50i-h6-operating-points";
> + nvmem-cells = <&cpu_speed_grade>;
> + nvmem-cell-names = "speed";
> + opp-shared;
>
> opp-408000000 {
> + clock-latency-ns = <244144>; /* 8 32k periods */
> opp-hz = /bits/ 64 <408000000>;
> - opp-microvolt = <900000 900000 1100000>;
> + opp-microvolt-speed0 = <900000>;
The separate property name thing was required when you could have
different values for different SoC instances, which can be read from
efuses, like in your case.
But all I see is speed0 here, why don't you always set opp-microvolt
then ?
Also why degrade from min/max/target type to just target ?
> };
>
> opp-1080000000 {
> + clock-latency-ns = <244144>; /* 8 32k periods */
> opp-hz = /bits/ 64 <1008000000>;
> - opp-microvolt = <900000 900000 1100000>;
> + opp-microvolt-speed0 = <900000>;
> };
> };
>
> @@ -115,3 +121,8 @@ pmu {
> <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>;
> };
> };
> +
> +&sid {
> + cpu_speed_grade: cpu-speed-grade@0 {
> + reg = <0x00 0x2>;
> + };
> +};
> --
> 2.30.2
--
viresh
On Thu, Dec 14, 2023 at 12:14 PM Viresh Kumar <viresh.kumar@linaro.org> wrote:
>
> On 14-12-23, 11:33, Brandon Cheo Fusi wrote:
> > Two OPPs are currently defined for the D1/D1s; one at 408MHz and
> > another at 1.08GHz. Switching between these can be done with the
> > "sun50i-cpufreq-nvmem" driver. This patch populates the opp table
> > appropriately, with inspiration from
> > https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi
> >
> > The supply voltages are PWM-controlled, but support for that IP
> > is still in the works. So stick to a fixed 0.9V vdd-cpu supply,
> > which seems to be the default on most D1 boards.
> >
> > Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
> > ---
> > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++---
> > 1 file changed, 15 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > index 64c3c2e6c..e211fe4c7 100644
> > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > @@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller {
> > };
> >
> > opp_table_cpu: opp-table-cpu {
> > - compatible = "operating-points-v2";
> > + compatible = "allwinner,sun20i-d1-operating-points",
>
> I don't think you should add a new compatible for every SoC that needs
> to be supported by a DT bindings and cpufreq driver. Maybe you should
> just reuse "allwinner,sun50i-h6-operating-points" and it will work
> fine for you ?
>
> Rob ?
>
> > + "allwinner,sun50i-h6-operating-points";
> > + nvmem-cells = <&cpu_speed_grade>;
> > + nvmem-cell-names = "speed";
> > + opp-shared;
> >
> > opp-408000000 {
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > opp-hz = /bits/ 64 <408000000>;
> > - opp-microvolt = <900000 900000 1100000>;
> > + opp-microvolt-speed0 = <900000>;
>
> The separate property name thing was required when you could have
> different values for different SoC instances, which can be read from
> efuses, like in your case.
>
> But all I see is speed0 here, why don't you always set opp-microvolt
> then ?
>
Setting opp-microvolt would be ok, but opp-microvolt-speed0 was chosen for
consistency with the driver bindings here
https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml#L52
> Also why degrade from min/max/target type to just target ?
>
This is a mistake on my part as I thought requesting non default voltages
was going to be a problem with lack of PWM support. Will be reverted in v2.
> > };
> >
> > opp-1080000000 {
> > + clock-latency-ns = <244144>; /* 8 32k periods */
> > opp-hz = /bits/ 64 <1008000000>;
> > - opp-microvolt = <900000 900000 1100000>;
> > + opp-microvolt-speed0 = <900000>;
> > };
> > };
> >
> > @@ -115,3 +121,8 @@ pmu {
> > <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>;
> > };
> > };
> > +
> > +&sid {
> > + cpu_speed_grade: cpu-speed-grade@0 {
> > + reg = <0x00 0x2>;
> > + };
> > +};
> > --
> > 2.30.2
>
> --
> viresh
Thank you for reviewing.
Brandon.
On Thu, Dec 14, 2023 at 04:44:46PM +0530, Viresh Kumar wrote:
> On 14-12-23, 11:33, Brandon Cheo Fusi wrote:
> > Two OPPs are currently defined for the D1/D1s; one at 408MHz and
> > another at 1.08GHz. Switching between these can be done with the
> > "sun50i-cpufreq-nvmem" driver. This patch populates the opp table
> > appropriately, with inspiration from
> > https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi
> >
> > The supply voltages are PWM-controlled, but support for that IP
> > is still in the works. So stick to a fixed 0.9V vdd-cpu supply,
> > which seems to be the default on most D1 boards.
> >
> > Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
> > ---
> > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++---
> > 1 file changed, 15 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > index 64c3c2e6c..e211fe4c7 100644
> > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > @@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller {
> > };
> >
> > opp_table_cpu: opp-table-cpu {
> > - compatible = "operating-points-v2";
> > + compatible = "allwinner,sun20i-d1-operating-points",
>
> I don't think you should add a new compatible for every SoC that needs
> to be supported by a DT bindings and cpufreq driver. Maybe you should
> just reuse "allwinner,sun50i-h6-operating-points" and it will work
> fine for you ?
>
> Rob ?
The driver can definitely just reuse sun50i-h6, but the binding and
devicetree should have a soc-specific compatible for the sun20i-d1.
That said, the compatible does need to be documented, there's a
dt-bindings patch missing from this series.
Cheers,
Conor.
On Thursday, December 14, 2023 2:47:14 PM CET Conor Dooley wrote:
> On Thu, Dec 14, 2023 at 04:44:46PM +0530, Viresh Kumar wrote:
> > On 14-12-23, 11:33, Brandon Cheo Fusi wrote:
> > > Two OPPs are currently defined for the D1/D1s; one at 408MHz and
> > > another at 1.08GHz. Switching between these can be done with the
> > > "sun50i-cpufreq-nvmem" driver. This patch populates the opp table
> > > appropriately, with inspiration from
> > > https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi
> > >
> > > The supply voltages are PWM-controlled, but support for that IP
> > > is still in the works. So stick to a fixed 0.9V vdd-cpu supply,
> > > which seems to be the default on most D1 boards.
> > >
> > > Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
> > > ---
> > > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++---
> > > 1 file changed, 15 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > > index 64c3c2e6c..e211fe4c7 100644
> > > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > > @@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller {
> > > };
> > >
> > > opp_table_cpu: opp-table-cpu {
> > > - compatible = "operating-points-v2";
> > > + compatible = "allwinner,sun20i-d1-operating-points",
> >
> > I don't think you should add a new compatible for every SoC that needs
> > to be supported by a DT bindings and cpufreq driver. Maybe you should
> > just reuse "allwinner,sun50i-h6-operating-points" and it will work
> > fine for you ?
> >
> > Rob ?
>
> The driver can definitely just reuse sun50i-h6, but the binding and
> devicetree should have a soc-specific compatible for the sun20i-d1.
Correct. This is to avoid later regrets if it turns out there are some slight
differences or additional functionality.
Best regards,
Jernej
>
> That said, the compatible does need to be documented, there's a
> dt-bindings patch missing from this series.
>
> Cheers,
> Conor.
On Thu, Dec 14, 2023 at 5:37 PM Jernej Škrabec <jernej.skrabec@gmail.com> wrote:
>
> On Thursday, December 14, 2023 2:47:14 PM CET Conor Dooley wrote:
> > On Thu, Dec 14, 2023 at 04:44:46PM +0530, Viresh Kumar wrote:
> > > On 14-12-23, 11:33, Brandon Cheo Fusi wrote:
> > > > Two OPPs are currently defined for the D1/D1s; one at 408MHz and
> > > > another at 1.08GHz. Switching between these can be done with the
> > > > "sun50i-cpufreq-nvmem" driver. This patch populates the opp table
> > > > appropriately, with inspiration from
> > > > https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi
> > > >
> > > > The supply voltages are PWM-controlled, but support for that IP
> > > > is still in the works. So stick to a fixed 0.9V vdd-cpu supply,
> > > > which seems to be the default on most D1 boards.
> > > >
> > > > Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
> > > > ---
> > > > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++---
> > > > 1 file changed, 15 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > > > index 64c3c2e6c..e211fe4c7 100644
> > > > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > > > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> > > > @@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller {
> > > > };
> > > >
> > > > opp_table_cpu: opp-table-cpu {
> > > > - compatible = "operating-points-v2";
> > > > + compatible = "allwinner,sun20i-d1-operating-points",
> > >
> > > I don't think you should add a new compatible for every SoC that needs
> > > to be supported by a DT bindings and cpufreq driver. Maybe you should
> > > just reuse "allwinner,sun50i-h6-operating-points" and it will work
> > > fine for you ?
> > >
> > > Rob ?
> >
> > The driver can definitely just reuse sun50i-h6, but the binding and
> > devicetree should have a soc-specific compatible for the sun20i-d1.
>
> Correct. This is to avoid later regrets if it turns out there are some slight
> differences or additional functionality.
>
> Best regards,
> Jernej
>
> >
> > That said, the compatible does need to be documented, there's a
> > dt-bindings patch missing from this series.
> >
> > Cheers,
> > Conor.
>
>
>
>
This dt-bindings patch will be available in v2
Thanks for reviewing.
Brandon.
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