The X1E80100 SoC includes a PDC, document it.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---
 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 86d61896f591..ea10cade3453 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -41,6 +41,7 @@ properties:
           - qcom,sm8250-pdc
           - qcom,sm8350-pdc
           - qcom,sm8450-pdc
+          - qcom,x1e80100-pdc
       - const: qcom,pdc
 
   reg:
-- 
2.17.1

On 17/11/2023 11:56, Sibi Sankar wrote:
> The X1E80100 SoC includes a PDC, document it.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---

Please rebase on next.

Best regards,
Krzysztof

On 11/17/23 18:37, Krzysztof Kozlowski wrote:
> On 17/11/2023 11:56, Sibi Sankar wrote:
>> The X1E80100 SoC includes a PDC, document it.
>>
>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>> ---
> 
> Please rebase on next.

This series was based on lnext-20231117.

-Sibi

> 
> Best regards,
> Krzysztof
>