am65-cpsw supports 8 TX hardware queues. Set this as default.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
 drivers/net/ethernet/ti/am65-cpsw-nuss.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
index ece9f8df98ae..7c440899c93c 100644
--- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
@@ -136,6 +136,8 @@
 			 NETIF_MSG_IFUP	| NETIF_MSG_PROBE | NETIF_MSG_IFDOWN | \
 			 NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
 
+#define AM65_CPSW_DEFAULT_TX_CHNS	8
+
 static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave,
 				      const u8 *dev_addr)
 {
@@ -2897,7 +2899,7 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev)
 
 	common->rx_flow_id_base = -1;
 	init_completion(&common->tdown_complete);
-	common->tx_ch_num = 1;
+	common->tx_ch_num = AM65_CPSW_DEFAULT_TX_CHNS;
 	common->pf_p0_rx_ptype_rrobin = false;
 	common->default_vlan = 1;
 
-- 
2.34.1

On Mon, Nov 13, 2023 at 01:07:07PM +0200, Roger Quadros wrote:
> am65-cpsw supports 8 TX hardware queues. Set this as default.

Motivation? Drawbacks / reasons why this was not done from the beginning?

On 14/11/2023 14:13, Vladimir Oltean wrote:
> On Mon, Nov 13, 2023 at 01:07:07PM +0200, Roger Quadros wrote:
>> am65-cpsw supports 8 TX hardware queues. Set this as default.
> 
> Motivation? Drawbacks / reasons why this was not done from the beginning?

Motivation was to get the "kselftest -t net/forwarding:ethtool_mm.sh" test to work
without requiring additional manual step of increasing the TX channels.

Another issue is that all network interfaces (can be up to 4 on some devices) have to be
brought down if TX channel count needs to change.

I am not aware why this was not done from the beginning.

-- 
cheers,
-roger

On Mon, Nov 13, 2023 at 01:07:07PM +0200, Roger Quadros wrote:
> am65-cpsw supports 8 TX hardware queues. Set this as default.
> 
> Signed-off-by: Roger Quadros <rogerq@kernel.org>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew