As these SoCs share similar IBECC registers, most of them are having
compute die IDs added for EDAC support. There are some minor differences
among them regarding IBECC presence detection, the number of memory
controllers, and the most significant bit of the error address.

[ Patch 1 serves as a preparation for Patch 4. ]

Qiuxu Zhuo (5):
  EDAC/igen6: Make get_mchbar() helper function
  EDAC/igen6: Add Intel Alder Lake-N SoCs support
  EDAC/igen6: Add Intel Raptor Lake-P SoCs support
  EDAC/igen6: Add Intel Meteor Lake-PS SoCs support
  EDAC/igen6: Add Intel Meteor Lake-P SoCs support

 drivers/edac/igen6_edac.c | 194 ++++++++++++++++++++++++++++++++++----
 1 file changed, 177 insertions(+), 17 deletions(-)


base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86
-- 
2.17.1

> As these SoCs share similar IBECC registers, most of them are having
> compute die IDs added for EDAC support. There are some minor differences
> among them regarding IBECC presence detection, the number of memory
> controllers, and the most significant bit of the error address.

Applied series.  Thanks.

-Tony