Small typos in register and field names.

Signed-off-by: Marielle Novastrider <marielle@novastrider.com>
---
 Documentation/arch/arm64/elf_hwcaps.rst | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst
index 76ff9d7398fd..9d51f0d72fc4 100644
--- a/Documentation/arch/arm64/elf_hwcaps.rst
+++ b/Documentation/arch/arm64/elf_hwcaps.rst
@@ -174,7 +174,7 @@ HWCAP2_DCPODP
     Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
 
 HWCAP2_SVE2
-    Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.
+    Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0001.
 
 HWCAP2_SVEAES
     Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.
@@ -222,7 +222,7 @@ HWCAP2_RNG
     Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.
 
 HWCAP2_BTI
-    Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.
+    Functionality implied by ID_AA64PFR1_EL1.BT == 0b0001.
 
 HWCAP2_MTE
     Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described
@@ -232,7 +232,7 @@ HWCAP2_ECV
     Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.
 
 HWCAP2_AFP
-    Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.
+    Functionality implied by ID_AA64MMFR1_EL1.AFP == 0b0001.
 
 HWCAP2_RPRES
     Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
-- 
2.39.3 (Apple Git-145)

On Tue, 31 Oct 2023 20:08:38 +0000, Marielle Novastrider wrote:
> Small typos in register and field names.
> 
> 

Applied to arm64 (for-next/core), thanks!

[1/1] Documentation/arm64: Fix typos in elf_hwcaps
      https://git.kernel.org/arm64/c/6eeeb4c7e4b5

-- 
Catalin

On Tue, Oct 31, 2023 at 08:08:38PM +0000, Marielle Novastrider wrote:
> Small typos in register and field names.
> 
> Signed-off-by: Marielle Novastrider <marielle@novastrider.com>
> ---
>  Documentation/arch/arm64/elf_hwcaps.rst | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Acked-by: Will Deacon <will@kernel.org>

Will