From: Linhua Xu <Linhua.Xu@unisoc.com>

As the UNISOC pin controller version iterates, more registers are required
to meet new functional requirements. Thus modify them.

Signed-off-by: Linhua Xu <Linhua.Xu@unisoc.com>
---
 drivers/pinctrl/sprd/pinctrl-sprd.h | 44 +++++++++++++++++------------
 1 file changed, 26 insertions(+), 18 deletions(-)

diff --git a/drivers/pinctrl/sprd/pinctrl-sprd.h b/drivers/pinctrl/sprd/pinctrl-sprd.h
index 23bced4665f1..a6ba75313da0 100644
--- a/drivers/pinctrl/sprd/pinctrl-sprd.h
+++ b/drivers/pinctrl/sprd/pinctrl-sprd.h
@@ -7,30 +7,38 @@
 #ifndef __PINCTRL_SPRD_H__
 #define __PINCTRL_SPRD_H__
 
+#include <linux/bits.h>
+
 struct platform_device;
 
-#define NUM_OFFSET	(20)
-#define TYPE_OFFSET	(16)
-#define BIT_OFFSET	(8)
-#define WIDTH_OFFSET	(4)
+#define NUM_OFFSET	22
+#define TYPE_OFFSET	18
+#define BIT_OFFSET	10
+#define WIDTH_OFFSET	6
+
+#define NUM_MASK	GENMASK(10, 0)
+#define TYPE_MASK	GENMASK(3, 0)
+#define BIT_MASK	GENMASK(7, 0)
+#define WIDTH_MASK	GENMASK(3, 0)
+#define REG_MASK	GENMASK(5, 0)
 
-#define SPRD_PIN_INFO(num, type, offset, width, reg)	\
-		(((num) & 0xFFF) << NUM_OFFSET |	\
-		 ((type) & 0xF) << TYPE_OFFSET |	\
-		 ((offset) & 0xFF) << BIT_OFFSET |	\
-		 ((width) & 0xF) << WIDTH_OFFSET |	\
-		 ((reg) & 0xF))
+#define SPRD_PIN_INFO(num, type, offset, width, reg)		\
+		(((num) & NUM_MASK) << NUM_OFFSET |		\
+		 ((type) & TYPE_MASK) << TYPE_OFFSET |		\
+		 ((offset) & BIT_MASK) << BIT_OFFSET |		\
+		 ((width) & WIDTH_MASK) << WIDTH_OFFSET |	\
+		 ((reg) & REG_MASK))
 
 #define SPRD_PINCTRL_PIN(pin)	SPRD_PINCTRL_PIN_DATA(pin, #pin)
 
-#define SPRD_PINCTRL_PIN_DATA(a, b)				\
-	{							\
-		.name = b,					\
-		.num = (((a) >> NUM_OFFSET) & 0xfff),		\
-		.type = (((a) >> TYPE_OFFSET) & 0xf),		\
-		.bit_offset = (((a) >> BIT_OFFSET) & 0xff),	\
-		.bit_width = ((a) >> WIDTH_OFFSET & 0xf),	\
-		.reg = ((a) & 0xf)				\
+#define SPRD_PINCTRL_PIN_DATA(a, b)					\
+	{								\
+		.name = b,						\
+		.num = (((a) >> NUM_OFFSET) & NUM_MASK),		\
+		.type = (((a) >> TYPE_OFFSET) & TYPE_MASK),		\
+		.bit_offset = (((a) & BIT_OFFSET) & BIT_MASK),		\
+		.bit_width = (((a) & WIDTH_OFFSET) & WIDTH_MASK),	\
+		.reg = ((a) & REG_MASK)					\
 	}
 
 enum pin_type {
-- 
2.17.1

Hi Linhua,

kernel test robot noticed the following build warnings:

[auto build test WARNING on linusw-pinctrl/devel]
[also build test WARNING on linusw-pinctrl/for-next linus/master v6.6-rc7 next-20231026]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Linhua-Xu/pinctrl-sprd-Modify-pull-up-parameters/20231027-151737
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
patch link:    https://lore.kernel.org/r/20231027071426.17724-5-Linhua.xu%40unisoc.com
patch subject: [PATCH V3 4/6] pinctrl: sprd: Increase the range of register values
config: m68k-allyesconfig (https://download.01.org/0day-ci/archive/20231027/202310271959.VUpjvnai-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231027/202310271959.VUpjvnai-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202310271959.VUpjvnai-lkp@intel.com/

All warnings (new ones prefixed by >>):

   In file included from drivers/pinctrl/sprd/pinctrl-sprd.c:29:
>> drivers/pinctrl/sprd/pinctrl-sprd.h:21: warning: "BIT_MASK" redefined
      21 | #define BIT_MASK        GENMASK(7, 0)
         | 
   In file included from include/linux/ratelimit_types.h:5,
                    from include/linux/printk.h:9,
                    from include/asm-generic/bug.h:22,
                    from arch/m68k/include/asm/bug.h:32,
                    from include/linux/bug.h:5,
                    from include/linux/thread_info.h:13,
                    from include/asm-generic/preempt.h:5,
                    from ./arch/m68k/include/generated/asm/preempt.h:1,
                    from include/linux/preempt.h:79,
                    from include/linux/spinlock.h:56,
                    from include/linux/wait.h:9,
                    from include/linux/wait_bit.h:8,
                    from include/linux/fs.h:6,
                    from include/linux/debugfs.h:15,
                    from drivers/pinctrl/sprd/pinctrl-sprd.c:7:
   include/linux/bits.h:9: note: this is the location of the previous definition
       9 | #define BIT_MASK(nr)            (UL(1) << ((nr) % BITS_PER_LONG))
         | 


vim +/BIT_MASK +21 drivers/pinctrl/sprd/pinctrl-sprd.h

    18	
    19	#define NUM_MASK	GENMASK(10, 0)
    20	#define TYPE_MASK	GENMASK(3, 0)
  > 21	#define BIT_MASK	GENMASK(7, 0)
    22	#define WIDTH_MASK	GENMASK(3, 0)
    23	#define REG_MASK	GENMASK(5, 0)
    24	

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