From: Rajendra Nayak <quic_rjendra@quicinc.com>

These are the CPU cores in Qualcomm's SC8380XP SoC.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---
 Documentation/devicetree/bindings/arm/cpus.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
index ffd526363fda..cc5a21b47e26 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -198,6 +198,7 @@ properties:
       - qcom,kryo660
       - qcom,kryo685
       - qcom,kryo780
+      - qcom,oryon
       - qcom,scorpion
 
   enable-method:
-- 
2.17.1

On 10/25/23 16:24, Sibi Sankar wrote:
> From: Rajendra Nayak <quic_rjendra@quicinc.com>
> 
> These are the CPU cores in Qualcomm's SC8380XP SoC.
> 
> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
There was an off-list discussion, not sure if it reached you in the
end, but this won't fly. I was told there are at least two separate
core types (discernable by a different MIDR_EL1[PART_NUM] [1]), all
of which should have their own compatible, otherwise we will introduce
something as meaningless as qcom,kryo before - we want more
granularity, like arm,cortex-x1 or arm,cortex-a78 are separate.


[1] https://developer.arm.com/documentation/ddi0601/2023-09/AArch64-Registers/MIDR-EL1--Main-ID-Register

Konrad