[RFC PATCH 06/12] iommu: Add mmu_notifier to sva domain

Tina Zhang posted 12 patches 2 years, 2 months ago
[RFC PATCH 06/12] iommu: Add mmu_notifier to sva domain
Posted by Tina Zhang 2 years, 2 months ago
Devices attached to shared virtual addressing (SVA) domain are allowed to
use the same virtual addresses with processor, and this functionality is
called shared virtual memory. When shared virtual memory is being used,
it's the sva domain's responsibility to keep device TLB cache and the CPU
cache in sync. Hence add mmu_notifier to sva domain.

Signed-off-by: Tina Zhang <tina.zhang@intel.com>
---
 include/linux/iommu.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 19b5ae2303ff..afb566230427 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -7,6 +7,7 @@
 #ifndef __LINUX_IOMMU_H
 #define __LINUX_IOMMU_H
 
+#include <linux/mmu_notifier.h>
 #include <linux/scatterlist.h>
 #include <linux/device.h>
 #include <linux/types.h>
@@ -114,6 +115,7 @@ struct iommu_domain {
 			 * protected by iommu_sva_lock.
 			 */
 			struct list_head next;
+			struct mmu_notifier notifier;
 		};
 	};
 };
-- 
2.39.3
Re: [RFC PATCH 06/12] iommu: Add mmu_notifier to sva domain
Posted by Jason Gunthorpe 2 years, 1 month ago
On Tue, Oct 17, 2023 at 11:20:39AM +0800, Tina Zhang wrote:
> Devices attached to shared virtual addressing (SVA) domain are allowed to
> use the same virtual addresses with processor, and this functionality is
> called shared virtual memory. When shared virtual memory is being used,
> it's the sva domain's responsibility to keep device TLB cache and the CPU
> cache in sync. Hence add mmu_notifier to sva domain.
> 
> Signed-off-by: Tina Zhang <tina.zhang@intel.com>
> ---
>  include/linux/iommu.h | 2 ++
>  1 file changed, 2 insertions(+)

You should look at how arm smmuv3 ended up after I went over it to
make similar changes, I think you should take this patch

https://lore.kernel.org/linux-iommu/20-v1-afbb86647bbd+5-smmuv3_newapi_p2_jgg@nvidia.com/

into this series (maybe drop the arm part)

And copy the same basic structure for how the mmu notifier works.

It would also be nice if alot of the 'if_sva' tests could be avoided,
smmu didn't end up with those..

In the guts of the pasid handling sva shouldn't be special beyond a
different source for the pgd.

Jason