Add UNIPHY node in USB to support Super-speed. As the SS PHY has
pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag.
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 1813b9fa4bb5..8fe4e45bfc18 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -349,8 +349,6 @@ usb: usb@8af8800 {
resets = <&gcc GCC_USB_BCR>;
- qcom,select-utmi-as-pipe-clk;
-
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -363,8 +361,8 @@ usb_dwc: usb@8a00000 {
clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "ref";
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- phy-names = "usb2-phy";
- phys = <&usbphy0>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phys = <&usbphy0>, <&usbphy1>;
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
--
2.34.1
On 29/09/2023 11:42, Praveenkumar I wrote:
> Add UNIPHY node in USB to support Super-speed. As the SS PHY has
> pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag.
>
> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> index 1813b9fa4bb5..8fe4e45bfc18 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> @@ -349,8 +349,6 @@ usb: usb@8af8800 {
>
> resets = <&gcc GCC_USB_BCR>;
>
> - qcom,select-utmi-as-pipe-clk;
> -
> #address-cells = <1>;
> #size-cells = <1>;
> ranges;
> @@ -363,8 +361,8 @@ usb_dwc: usb@8a00000 {
> clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
> clock-names = "ref";
> interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
> - phy-names = "usb2-phy";
> - phys = <&usbphy0>;
> + phy-names = "usb2-phy", "usb3-phy";
> + phys = <&usbphy0>, <&usbphy1>;
Ah, I see now. Maybe usbphy_ss_0 or something like that would be a
better label for this PHY. I'd expect usbphy1 to be used for other host
than usbphy0.
> tx-fifo-resize;
> snps,is-utmi-l1-suspend;
> snps,hird-threshold = /bits/ 8 <0x0>;
--
With best wishes
Dmitry
On 9/30/2023 10:57 PM, Dmitry Baryshkov wrote:
> On 29/09/2023 11:42, Praveenkumar I wrote:
>> Add UNIPHY node in USB to support Super-speed. As the SS PHY has
>> pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag.
>>
>> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 6 ++----
>> 1 file changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> index 1813b9fa4bb5..8fe4e45bfc18 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> @@ -349,8 +349,6 @@ usb: usb@8af8800 {
>> resets = <&gcc GCC_USB_BCR>;
>> - qcom,select-utmi-as-pipe-clk;
>> -
>> #address-cells = <1>;
>> #size-cells = <1>;
>> ranges;
>> @@ -363,8 +361,8 @@ usb_dwc: usb@8a00000 {
>> clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
>> clock-names = "ref";
>> interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
>> - phy-names = "usb2-phy";
>> - phys = <&usbphy0>;
>> + phy-names = "usb2-phy", "usb3-phy";
>> + phys = <&usbphy0>, <&usbphy1>;
>
> Ah, I see now. Maybe usbphy_ss_0 or something like that would be a
> better label for this PHY. I'd expect usbphy1 to be used for other
> host than usbphy0.
Sure, will change it.
>
>> tx-fifo-resize;
>> snps,is-utmi-l1-suspend;
>> snps,hird-threshold = /bits/ 8 <0x0>;
>
--
Thanks,
Praveenkumar
On 29.09.2023 10:42, Praveenkumar I wrote: > Add UNIPHY node in USB to support Super-speed. As the SS PHY has > pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag. > > Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> > --- Patches 6 and 7 should be swapped, otherwise you may get no USB with this commit. Incremental patches must not break functionality, unless it is truly inevitable. Konrad
On 9/29/2023 6:44 PM, Konrad Dybcio wrote: > On 29.09.2023 10:42, Praveenkumar I wrote: >> Add UNIPHY node in USB to support Super-speed. As the SS PHY has >> pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag. >> >> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> >> --- > Patches 6 and 7 should be swapped, otherwise you may get no > USB with this commit. Incremental patches must not break > functionality, unless it is truly inevitable. Understood. Will swap the 6 and 7 patches in the update. -- Thanks, Praveenkumar > > Konrad
On 29/09/2023 16:31, Praveenkumar I wrote: > > > On 9/29/2023 6:44 PM, Konrad Dybcio wrote: >> On 29.09.2023 10:42, Praveenkumar I wrote: >>> Add UNIPHY node in USB to support Super-speed. As the SS PHY has >>> pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag. >>> >>> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> >>> --- >> Patches 6 and 7 should be swapped, otherwise you may get no >> USB with this commit. Incremental patches must not break >> functionality, unless it is truly inevitable. > Understood. Will swap the 6 and 7 patches in the update. But just swapping the patches will not work, the patch for the board file will break compilation. I think you have to squash them. > > -- > Thanks, > Praveenkumar >> >> Konrad > -- With best wishes Dmitry
On 9/30/2023 10:56 PM, Dmitry Baryshkov wrote: > On 29/09/2023 16:31, Praveenkumar I wrote: >> >> >> On 9/29/2023 6:44 PM, Konrad Dybcio wrote: >>> On 29.09.2023 10:42, Praveenkumar I wrote: >>>> Add UNIPHY node in USB to support Super-speed. As the SS PHY has >>>> pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag. >>>> >>>> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> >>>> --- >>> Patches 6 and 7 should be swapped, otherwise you may get no >>> USB with this commit. Incremental patches must not break >>> functionality, unless it is truly inevitable. >> Understood. Will swap the 6 and 7 patches in the update. > > But just swapping the patches will not work, the patch for the board > file will break compilation. I think you have to squash them. I think swapping will work as the PHY node in the base dtsi added separately in patch 3. If compilation fails, will squash them. - Praveenkumar > >> >> -- >> Thanks, >> Praveenkumar >>> >>> Konrad >> >
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