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[PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances

Keerthy posted 7 patches 2 years, 4 months ago
There is a newer version of this series
[PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
Posted by Keerthy 2 years, 4 months ago 
There are totally 9 instances of watchdog module. One each for the
2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
for the 4 R5F cores in the main domain. Keeping only the A72 instances
enabled and disabling the rest by default.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
 1 file changed, 88 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 8a717b592238..5e3c0ef9b10b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1702,4 +1702,92 @@
 		ti,esm-pins = <688>, <689>;
 		bootph-pre-ram;
 	};
+
+	watchdog0: watchdog@2200000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x2200000 0x00 0x100>;
+		clocks = <&k3_clks 286 1>;
+		power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 286 1>;
+		assigned-clock-parents = <&k3_clks 286 5>;
+	};
+
+	watchdog1: watchdog@2210000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x2210000 0x00 0x100>;
+		clocks = <&k3_clks 287 1>;
+		power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 287 1>;
+		assigned-clock-parents = <&k3_clks 287 5>;
+	};
+
+	watchdog16: watchdog@2300000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x2300000 0x00 0x100>;
+		clocks = <&k3_clks 288 1>;
+		power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 288 1>;
+		assigned-clock-parents = <&k3_clks 288 5>;
+		status = "disabled";
+	};
+
+	watchdog17: watchdog@2310000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x2310000 0x00 0x100>;
+		clocks = <&k3_clks 289 1>;
+		power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 289 1>;
+		assigned-clock-parents = <&k3_clks 289 5>;
+		status = "disabled";
+	};
+
+	watchdog15: watchdog@22f0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x22f0000 0x00 0x100>;
+		clocks = <&k3_clks 290 1>;
+		power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 290 1>;
+		assigned-clock-parents = <&k3_clks 290 5>;
+		status = "disabled";
+	};
+
+	watchdog28: watchdog@23c0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23c0000 0x00 0x100>;
+		clocks = <&k3_clks 291 1>;
+		power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 291 1>;
+		assigned-clock-parents = <&k3_clks 291 5>;
+		status = "disabled";
+	};
+
+	watchdog29: watchdog@23d0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23d0000 0x00 0x100>;
+		clocks = <&k3_clks 292 1>;
+		power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 292 1>;
+		assigned-clock-parents = <&k3_clks 292 5>;
+		status = "disabled";
+	};
+
+	watchdog30: watchdog@23e0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23e0000 0x00 0x100>;
+		clocks = <&k3_clks 293 1>;
+		power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 293 1>;
+		assigned-clock-parents = <&k3_clks 293 5>;
+		status = "disabled";
+	};
+
+	watchdog31: watchdog@23f0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23f0000 0x00 0x100>;
+		clocks = <&k3_clks 294 1>;
+		power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 294 1>;
+		assigned-clock-parents = <&k3_clks 294 5>;
+		status = "disabled";
+	};
 };
-- 
2.17.1
Re: [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
Posted by Nishanth Menon 2 years, 4 months ago 
On 18:58-20230926, Keerthy wrote:
> There are totally 9 instances of watchdog module. One each for the
> 2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
> for the 4 R5F cores in the main domain. Keeping only the A72 instances
> enabled and disabling the rest by default.

Will be good to explain why in the commit message as well.

> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
>  1 file changed, 88 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 8a717b592238..5e3c0ef9b10b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -1702,4 +1702,92 @@
>  		ti,esm-pins = <688>, <689>;
>  		bootph-pre-ram;
>  	};
> +
> +	watchdog0: watchdog@2200000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2200000 0x00 0x100>;
> +		clocks = <&k3_clks 286 1>;
> +		power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 286 1>;
> +		assigned-clock-parents = <&k3_clks 286 5>;
> +	};
> +
> +	watchdog1: watchdog@2210000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2210000 0x00 0x100>;
> +		clocks = <&k3_clks 287 1>;
> +		power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 287 1>;
> +		assigned-clock-parents = <&k3_clks 287 5>;
> +	};
> +
> +	watchdog16: watchdog@2300000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2300000 0x00 0x100>;
> +		clocks = <&k3_clks 288 1>;
> +		power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 288 1>;
> +		assigned-clock-parents = <&k3_clks 288 5>;
> +		status = "disabled";
> +	};
> +
> +	watchdog17: watchdog@2310000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x2310000 0x00 0x100>;
> +		clocks = <&k3_clks 289 1>;
> +		power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 289 1>;
> +		assigned-clock-parents = <&k3_clks 289 5>;
> +		status = "disabled";
> +	};
> +
> +	watchdog15: watchdog@22f0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x22f0000 0x00 0x100>;
> +		clocks = <&k3_clks 290 1>;
> +		power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 290 1>;
> +		assigned-clock-parents = <&k3_clks 290 5>;
> +		status = "disabled";
> +	};
> +
> +	watchdog28: watchdog@23c0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23c0000 0x00 0x100>;
> +		clocks = <&k3_clks 291 1>;
> +		power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 291 1>;
> +		assigned-clock-parents = <&k3_clks 291 5>;
> +		status = "disabled";
> +	};
> +
> +	watchdog29: watchdog@23d0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23d0000 0x00 0x100>;
> +		clocks = <&k3_clks 292 1>;
> +		power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 292 1>;
> +		assigned-clock-parents = <&k3_clks 292 5>;
> +		status = "disabled";
> +	};
> +
> +	watchdog30: watchdog@23e0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23e0000 0x00 0x100>;
> +		clocks = <&k3_clks 293 1>;
> +		power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 293 1>;
> +		assigned-clock-parents = <&k3_clks 293 5>;
> +		status = "disabled";
> +	};
> +
> +	watchdog31: watchdog@23f0000 {
> +		compatible = "ti,j7-rti-wdt";
> +		reg = <0x00 0x23f0000 0x00 0x100>;
> +		clocks = <&k3_clks 294 1>;
> +		power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
> +		assigned-clocks = <&k3_clks 294 1>;
> +		assigned-clock-parents = <&k3_clks 294 5>;
> +		status = "disabled";

Missing documentation here as well.

> +	};
>  };
> -- 
> 2.17.1
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
Re: [PATCH v5 6/7] arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
Posted by J, KEERTHY 2 years, 4 months ago 

On 9/26/2023 10:43 PM, Nishanth Menon wrote:
> On 18:58-20230926, Keerthy wrote:
>> There are totally 9 instances of watchdog module. One each for the
>> 2 A72 cores, one each for the 2 C7x cores, 1 for the GPU, 1 each
>> for the 4 R5F cores in the main domain. Keeping only the A72 instances
>> enabled and disabling the rest by default.
> 
> Will be good to explain why in the commit message as well.

I will add that.

> 
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 88 ++++++++++++++++++++++
>>   1 file changed, 88 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> index 8a717b592238..5e3c0ef9b10b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> @@ -1702,4 +1702,92 @@
>>   		ti,esm-pins = <688>, <689>;
>>   		bootph-pre-ram;
>>   	};
>> +
>> +	watchdog0: watchdog@2200000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x2200000 0x00 0x100>;
>> +		clocks = <&k3_clks 286 1>;
>> +		power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 286 1>;
>> +		assigned-clock-parents = <&k3_clks 286 5>;
>> +	};
>> +
>> +	watchdog1: watchdog@2210000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x2210000 0x00 0x100>;
>> +		clocks = <&k3_clks 287 1>;
>> +		power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 287 1>;
>> +		assigned-clock-parents = <&k3_clks 287 5>;
>> +	};
>> +
>> +	watchdog16: watchdog@2300000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x2300000 0x00 0x100>;
>> +		clocks = <&k3_clks 288 1>;
>> +		power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 288 1>;
>> +		assigned-clock-parents = <&k3_clks 288 5>;
>> +		status = "disabled";
>> +	};
>> +
>> +	watchdog17: watchdog@2310000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x2310000 0x00 0x100>;
>> +		clocks = <&k3_clks 289 1>;
>> +		power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 289 1>;
>> +		assigned-clock-parents = <&k3_clks 289 5>;
>> +		status = "disabled";
>> +	};
>> +
>> +	watchdog15: watchdog@22f0000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x22f0000 0x00 0x100>;
>> +		clocks = <&k3_clks 290 1>;
>> +		power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 290 1>;
>> +		assigned-clock-parents = <&k3_clks 290 5>;
>> +		status = "disabled";
>> +	};
>> +
>> +	watchdog28: watchdog@23c0000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x23c0000 0x00 0x100>;
>> +		clocks = <&k3_clks 291 1>;
>> +		power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 291 1>;
>> +		assigned-clock-parents = <&k3_clks 291 5>;
>> +		status = "disabled";
>> +	};
>> +
>> +	watchdog29: watchdog@23d0000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x23d0000 0x00 0x100>;
>> +		clocks = <&k3_clks 292 1>;
>> +		power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 292 1>;
>> +		assigned-clock-parents = <&k3_clks 292 5>;
>> +		status = "disabled";
>> +	};
>> +
>> +	watchdog30: watchdog@23e0000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x23e0000 0x00 0x100>;
>> +		clocks = <&k3_clks 293 1>;
>> +		power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 293 1>;
>> +		assigned-clock-parents = <&k3_clks 293 5>;
>> +		status = "disabled";
>> +	};
>> +
>> +	watchdog31: watchdog@23f0000 {
>> +		compatible = "ti,j7-rti-wdt";
>> +		reg = <0x00 0x23f0000 0x00 0x100>;
>> +		clocks = <&k3_clks 294 1>;
>> +		power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
>> +		assigned-clocks = <&k3_clks 294 1>;
>> +		assigned-clock-parents = <&k3_clks 294 5>;
>> +		status = "disabled";
> 
> Missing documentation here as well.

Sure. I will add that.

> 
>> +	};
>>   };
>> -- 
>> 2.17.1
>>
>

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