Hi, Hsiao-chien:
On Mon, 2023-09-11 at 15:42 +0800, Hsiao Chien Sung wrote:
> Padding is a new hardware module on MediaTek MT8188,
> add dt-bindings for it.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
> .../display/mediatek/mediatek,padding.yaml | 81
> +++++++++++++++++++
> 1 file changed, 81 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/display/mediatek/mediatek,padding.y
> aml
>
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding
> .yaml
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding
> .yaml
> new file mode 100644
> index 000000000000..db24801ebc48
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding
> .yaml
> @@ -0,0 +1,81 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Padding
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Philipp Zabel <p.zabel@pengutronix.de>
> +
> +description:
> + Padding provides ability to add pixels to width and height of a
> layer with
> + specified colors. Due to hardware design, Mixer in VDOSYS1
> requires
> + width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR
> is enabled,
> + we need Padding to deal with odd width.
> + Please notice that even if the Padding is in bypass mode, settings
> in
> + register must be cleared to 0, or undefined behaviors could
> happen.
> +
> +properties:
> + compatible:
> + const: mediatek,mt8188-padding
> +
> + reg:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: RDMA Clock
> +
> + mediatek,gce-client-reg:
> + description:
> + GCE (Global Command Engine) is a multi-core micro processor
> that helps
> + its clients to execute commands without interrupting CPU. This
> property
> + describes GCE client's information that is composed by 4
> fields.
> + 1. Phandle of the GCE (there may be several GCE processors)
> + 2. Sub-system ID defined in the dt-binding like a user ID
> + (Please refer to include/dt-bindings/gce/<chip>-gce.h)
> + 3. Offset from base address of the subsys you are at
> + 4. Size of the register the client needs
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + items:
> + - description: Phandle of the GCE
> + - description: Subsys ID defined in the dt-binding
> + - description: Offset from base address of the subsys
> + - description: Size of register
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - power-domains
> + - clocks
> + - mediatek,gce-client-reg
I think padding could work without gce. After drop this,
Reviewed-by: CK Hu <ck.hu@mediatek.com>
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/mediatek,mt8188-clk.h>
> + #include <dt-bindings/power/mediatek,mt8188-power.h>
> + #include <dt-bindings/gce/mt8195-gce.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + padding0: padding@1c11d000 {
> + compatible = "mediatek,mt8188-padding";
> + reg = <0 0x1c11d000 0 0x1000>;
> + clocks = <&vdosys1 CLK_VDO1_PADDING0>;
> + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
> + mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000
> 0x1000>;
> + };
> + };
> --
> 2.18.0
>