When XCR0[9] is set, PKRU can be read and written from userspace with
XSAVE and XRSTOR, even when CR4.PKE is clear.

Clear XCR0[9] when protection keys are disabled.

Reported-by: Tavis Ormandy <taviso@google.com>
Signed-off-by: Jim Mattson <jmattson@google.com>
---
 arch/x86/kernel/fpu/xstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 1afbc4866b10..a27b4f7b9365 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -71,7 +71,7 @@ static unsigned short xsave_cpuid_features[] __initdata = {
 	[XFEATURE_ZMM_Hi256]			= X86_FEATURE_AVX512F,
 	[XFEATURE_Hi16_ZMM]			= X86_FEATURE_AVX512F,
 	[XFEATURE_PT_UNIMPLEMENTED_SO_FAR]	= X86_FEATURE_INTEL_PT,
-	[XFEATURE_PKRU]				= X86_FEATURE_PKU,
+	[XFEATURE_PKRU]				= X86_FEATURE_OSPKE,
 	[XFEATURE_PASID]			= X86_FEATURE_ENQCMD,
 	[XFEATURE_XTILE_CFG]			= X86_FEATURE_AMX_TILE,
 	[XFEATURE_XTILE_DATA]			= X86_FEATURE_AMX_TILE,
-- 
2.42.0.283.g2d96d420d3-goog

On 8/30/23 21:32, Jim Mattson wrote:
> When XCR0[9] is set, PKRU can be read and written from userspace with
> XSAVE and XRSTOR, even when CR4.PKE is clear.
> 
> Clear XCR0[9] when protection keys are disabled.
> 
> Reported-by: Tavis Ormandy <taviso@google.com>
> Signed-off-by: Jim Mattson <jmattson@google.com>

Is there any way to trigger this other than "nopku" on the command-line?

I'm not sure how scary this particular covert channel is, but it does
make sense to do this even if it's only to avoid wasting XSAVE space on
a feature that nobody can use (for things other than covert channels).

Acked-by: Dave Hansen <dave.hansen@linux.intel.com>

On Thu, Aug 31, 2023 at 12:12 PM Dave Hansen <dave.hansen@intel.com> wrote:
>
> On 8/30/23 21:32, Jim Mattson wrote:
> > When XCR0[9] is set, PKRU can be read and written from userspace with
> > XSAVE and XRSTOR, even when CR4.PKE is clear.
> >
> > Clear XCR0[9] when protection keys are disabled.
> >
> > Reported-by: Tavis Ormandy <taviso@google.com>
> > Signed-off-by: Jim Mattson <jmattson@google.com>
>
> Is there any way to trigger this other than "nopku" on the command-line?

Or by configuration option:

CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=n

> I'm not sure how scary this particular covert channel is, but it does
> make sense to do this even if it's only to avoid wasting XSAVE space on
> a feature that nobody can use (for things other than covert channels).
>
> Acked-by: Dave Hansen <dave.hansen@linux.intel.com>

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     18032b47adf1db7b7f5fb2d1344e65aafe6417df
Gitweb:        https://git.kernel.org/tip/18032b47adf1db7b7f5fb2d1344e65aafe6417df
Author:        Jim Mattson <jmattson@google.com>
AuthorDate:    Wed, 30 Aug 2023 21:32:21 -07:00
Committer:     Ingo Molnar <mingo@kernel.org>
CommitterDate: Thu, 31 Aug 2023 23:29:49 +02:00

x86/fpu/xstate: Fix PKRU covert channel

When XCR0[9] is set, PKRU can be read and written from userspace with
XSAVE and XRSTOR, even when CR4.PKE is clear.

Clear XCR0[9] when protection keys are disabled.

Reported-by: Tavis Ormandy <taviso@google.com>
Signed-off-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/r/20230831043228.1194256-1-jmattson@google.com
---
 arch/x86/kernel/fpu/xstate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 1afbc48..a27b4f7 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -71,7 +71,7 @@ static unsigned short xsave_cpuid_features[] __initdata = {
 	[XFEATURE_ZMM_Hi256]			= X86_FEATURE_AVX512F,
 	[XFEATURE_Hi16_ZMM]			= X86_FEATURE_AVX512F,
 	[XFEATURE_PT_UNIMPLEMENTED_SO_FAR]	= X86_FEATURE_INTEL_PT,
-	[XFEATURE_PKRU]				= X86_FEATURE_PKU,
+	[XFEATURE_PKRU]				= X86_FEATURE_OSPKE,
 	[XFEATURE_PASID]			= X86_FEATURE_ENQCMD,
 	[XFEATURE_XTILE_CFG]			= X86_FEATURE_AMX_TILE,
 	[XFEATURE_XTILE_DATA]			= X86_FEATURE_AMX_TILE,