Add phy init sequence and compatible string for IPQ5018
chipset.
Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
---
V2:
Updated the commit message.
---
drivers/phy/qualcomm/phy-qcom-m31.c | 60 +++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-m31.c b/drivers/phy/qualcomm/phy-qcom-m31.c
index ed08072ca032..81b72ebde305 100644
--- a/drivers/phy/qualcomm/phy-qcom-m31.c
+++ b/drivers/phy/qualcomm/phy-qcom-m31.c
@@ -82,6 +82,59 @@ struct m31_priv_data {
unsigned int nregs;
};
+struct m31_phy_regs m31_ipq5018_regs[] = {
+ {
+ USB_PHY_CFG0,
+ UTMI_PHY_OVERRIDE_EN,
+ 0
+ },
+ {
+ USB_PHY_UTMI_CTRL5,
+ POR_EN,
+ 15
+ },
+ {
+ USB_PHY_FSEL_SEL,
+ FREQ_SEL,
+ 0
+ },
+ {
+ USB_PHY_HS_PHY_CTRL_COMMON0,
+ COMMONONN | FSEL | RETENABLEN,
+ 0
+ },
+ {
+ USB_PHY_REFCLK_CTRL,
+ CLKCORE,
+ 0
+ },
+ {
+ USB_PHY_UTMI_CTRL5,
+ POR_EN,
+ 0
+ },
+ {
+ USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N_SEL | USB2_SUSPEND_N | USB2_UTMI_CLK_EN,
+ 0
+ },
+ {
+ USB_PHY_UTMI_CTRL5,
+ 0x0,
+ 0
+ },
+ {
+ USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N | USB2_UTMI_CLK_EN,
+ 0
+ },
+ {
+ USB_PHY_CFG0,
+ 0x0,
+ 0
+ },
+};
+
struct m31_phy_regs m31_ipq5332_regs[] = {
{
USB_PHY_CFG0,
@@ -268,6 +321,12 @@ static int m31usb_phy_probe(struct platform_device *pdev)
return PTR_ERR_OR_ZERO(phy_provider);
}
+static const struct m31_priv_data m31_ipq5018_data = {
+ .ulpi_mode = false,
+ .regs = m31_ipq5018_regs,
+ .nregs = ARRAY_SIZE(m31_ipq5018_regs),
+};
+
static const struct m31_priv_data m31_ipq5332_data = {
.ulpi_mode = false,
.regs = m31_ipq5332_regs,
@@ -275,6 +334,7 @@ static const struct m31_priv_data m31_ipq5332_data = {
};
static const struct of_device_id m31usb_phy_id_table[] = {
+ { .compatible = "qcom,ipq5018-usb-hsphy", .data = &m31_ipq5018_data },
{ .compatible = "qcom,ipq5332-usb-hsphy", .data = &m31_ipq5332_data },
{ },
};
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On Wed, 30 Aug 2023 at 21:32, Nitheesh Sekar <quic_nsekar@quicinc.com> wrote:
>
> Add phy init sequence and compatible string for IPQ5018
> chipset.
>
> Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
> ---
> V2:
> Updated the commit message.
> ---
> drivers/phy/qualcomm/phy-qcom-m31.c | 60 +++++++++++++++++++++++++++++
> 1 file changed, 60 insertions(+)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-m31.c b/drivers/phy/qualcomm/phy-qcom-m31.c
> index ed08072ca032..81b72ebde305 100644
> --- a/drivers/phy/qualcomm/phy-qcom-m31.c
> +++ b/drivers/phy/qualcomm/phy-qcom-m31.c
> @@ -82,6 +82,59 @@ struct m31_priv_data {
> unsigned int nregs;
> };
>
> +struct m31_phy_regs m31_ipq5018_regs[] = {
> + {
> + USB_PHY_CFG0,
> + UTMI_PHY_OVERRIDE_EN,
> + 0
> + },
c99 initialisers? And maybe drop the 0 delay inits.
> + {
> + USB_PHY_UTMI_CTRL5,
> + POR_EN,
> + 15
> + },
> + {
> + USB_PHY_FSEL_SEL,
> + FREQ_SEL,
> + 0
> + },
> + {
> + USB_PHY_HS_PHY_CTRL_COMMON0,
> + COMMONONN | FSEL | RETENABLEN,
> + 0
> + },
> + {
> + USB_PHY_REFCLK_CTRL,
> + CLKCORE,
> + 0
> + },
> + {
> + USB_PHY_UTMI_CTRL5,
> + POR_EN,
> + 0
> + },
> + {
> + USB_PHY_HS_PHY_CTRL2,
> + USB2_SUSPEND_N_SEL | USB2_SUSPEND_N | USB2_UTMI_CLK_EN,
> + 0
> + },
> + {
> + USB_PHY_UTMI_CTRL5,
> + 0x0,
> + 0
> + },
> + {
> + USB_PHY_HS_PHY_CTRL2,
> + USB2_SUSPEND_N | USB2_UTMI_CLK_EN,
> + 0
> + },
> + {
> + USB_PHY_CFG0,
> + 0x0,
> + 0
> + },
> +};
> +
> struct m31_phy_regs m31_ipq5332_regs[] = {
> {
> USB_PHY_CFG0,
> @@ -268,6 +321,12 @@ static int m31usb_phy_probe(struct platform_device *pdev)
> return PTR_ERR_OR_ZERO(phy_provider);
> }
>
> +static const struct m31_priv_data m31_ipq5018_data = {
> + .ulpi_mode = false,
> + .regs = m31_ipq5018_regs,
> + .nregs = ARRAY_SIZE(m31_ipq5018_regs),
> +};
> +
> static const struct m31_priv_data m31_ipq5332_data = {
> .ulpi_mode = false,
> .regs = m31_ipq5332_regs,
> @@ -275,6 +334,7 @@ static const struct m31_priv_data m31_ipq5332_data = {
> };
>
> static const struct of_device_id m31usb_phy_id_table[] = {
> + { .compatible = "qcom,ipq5018-usb-hsphy", .data = &m31_ipq5018_data },
> { .compatible = "qcom,ipq5332-usb-hsphy", .data = &m31_ipq5332_data },
> { },
> };
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
With best wishes
Dmitry
On 30.08.2023 13:17, Nitheesh Sekar wrote:
> Add phy init sequence and compatible string for IPQ5018
> chipset.
>
> Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
> ---
> V2:
> Updated the commit message.
> ---
> drivers/phy/qualcomm/phy-qcom-m31.c | 60 +++++++++++++++++++++++++++++
> 1 file changed, 60 insertions(+)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-m31.c b/drivers/phy/qualcomm/phy-qcom-m31.c
> index ed08072ca032..81b72ebde305 100644
> --- a/drivers/phy/qualcomm/phy-qcom-m31.c
> +++ b/drivers/phy/qualcomm/phy-qcom-m31.c
> @@ -82,6 +82,59 @@ struct m31_priv_data {
> unsigned int nregs;
> };
>
> +struct m31_phy_regs m31_ipq5018_regs[] = {
static const?
Konrad
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