From: Linhua Xu <Linhua.Xu@unisoc.com>
For UNISOC pin controller, the offset values of the common register and
misc register will be different. Thus put these in the probe function
parameters.
Signed-off-by: Linhua Xu <Linhua.Xu@unisoc.com>
---
drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c | 7 ++++-
drivers/pinctrl/sprd/pinctrl-sprd.c | 31 ++++++++++++----------
drivers/pinctrl/sprd/pinctrl-sprd.h | 3 ++-
3 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c b/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c
index d14f382f2392..05158c71ad77 100644
--- a/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c
+++ b/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c
@@ -10,6 +10,9 @@
#include "pinctrl-sprd.h"
+#define PINCTRL_REG_OFFSET 0x20
+#define PINCTRL_REG_MISC_OFFSET 0x4020
+
enum sprd_sc9860_pins {
/* pin global control register 0 */
SC9860_VIO28_0_IRTE = SPRD_PIN_INFO(0, GLOBAL_CTRL_PIN, 11, 1, 0),
@@ -926,7 +929,9 @@ static struct sprd_pins_info sprd_sc9860_pins_info[] = {
static int sprd_pinctrl_probe(struct platform_device *pdev)
{
return sprd_pinctrl_core_probe(pdev, sprd_sc9860_pins_info,
- ARRAY_SIZE(sprd_sc9860_pins_info));
+ ARRAY_SIZE(sprd_sc9860_pins_info),
+ PINCTRL_REG_OFFSET,
+ PINCTRL_REG_MISC_OFFSET);
}
static const struct of_device_id sprd_pinctrl_of_match[] = {
diff --git a/drivers/pinctrl/sprd/pinctrl-sprd.c b/drivers/pinctrl/sprd/pinctrl-sprd.c
index ca9659f4e4b1..4ee030d723c4 100644
--- a/drivers/pinctrl/sprd/pinctrl-sprd.c
+++ b/drivers/pinctrl/sprd/pinctrl-sprd.c
@@ -30,8 +30,6 @@
#include "pinctrl-sprd.h"
#define PINCTRL_BIT_MASK(width) (~(~0UL << (width)))
-#define PINCTRL_REG_OFFSET 0x20
-#define PINCTRL_REG_MISC_OFFSET 0x4020
#define PINCTRL_REG_LEN 0x4
#define PIN_FUNC_MASK (BIT(4) | BIT(5))
@@ -154,6 +152,8 @@ struct sprd_pinctrl {
struct pinctrl_dev *pctl;
void __iomem *base;
struct sprd_pinctrl_soc_info *info;
+ u32 common_pin_offset;
+ u32 misc_pin_offset;
};
#define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1)
@@ -999,7 +999,7 @@ static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
unsigned int ctrl_pin = 0, com_pin = 0;
struct sprd_pin *pin;
- int i;
+ unsigned int i;
info->npins = pins_cnt;
info->pins = devm_kcalloc(sprd_pctl->dev,
@@ -1016,19 +1016,19 @@ static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
pin->number = sprd_soc_pin_info[i].num;
reg = sprd_soc_pin_info[i].reg;
if (pin->type == GLOBAL_CTRL_PIN) {
- pin->reg = (unsigned long)sprd_pctl->base +
- PINCTRL_REG_LEN * reg;
+ pin->reg = (unsigned long)(sprd_pctl->base +
+ (unsigned long)(PINCTRL_REG_LEN * reg));
pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
pin->bit_width = sprd_soc_pin_info[i].bit_width;
ctrl_pin++;
} else if (pin->type == COMMON_PIN) {
pin->reg = (unsigned long)sprd_pctl->base +
- PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
+ sprd_pctl->common_pin_offset + PINCTRL_REG_LEN *
(i - ctrl_pin);
com_pin++;
} else if (pin->type == MISC_PIN) {
pin->reg = (unsigned long)sprd_pctl->base +
- PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
+ sprd_pctl->misc_pin_offset + PINCTRL_REG_LEN *
(i - ctrl_pin - com_pin);
}
}
@@ -1045,7 +1045,9 @@ static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
int sprd_pinctrl_core_probe(struct platform_device *pdev,
struct sprd_pins_info *sprd_soc_pin_info,
- int pins_cnt)
+ int pins_cnt,
+ u32 common_pin_offset,
+ u32 misc_pin_offset)
{
struct sprd_pinctrl *sprd_pctl;
struct sprd_pinctrl_soc_info *pinctrl_info;
@@ -1069,6 +1071,8 @@ int sprd_pinctrl_core_probe(struct platform_device *pdev,
sprd_pctl->info = pinctrl_info;
sprd_pctl->dev = &pdev->dev;
+ sprd_pctl->common_pin_offset = common_pin_offset;
+ sprd_pctl->misc_pin_offset = misc_pin_offset;
platform_set_drvdata(pdev, sprd_pctl);
ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
@@ -1077,12 +1081,6 @@ int sprd_pinctrl_core_probe(struct platform_device *pdev,
return ret;
}
- ret = sprd_pinctrl_parse_dt(sprd_pctl);
- if (ret) {
- dev_err(&pdev->dev, "fail to parse dt properties\n");
- return ret;
- }
-
pin_desc = devm_kcalloc(&pdev->dev,
pinctrl_info->npins,
sizeof(struct pinctrl_pin_desc),
@@ -1100,6 +1098,11 @@ int sprd_pinctrl_core_probe(struct platform_device *pdev,
sprd_pinctrl_desc.name = dev_name(&pdev->dev);
sprd_pinctrl_desc.npins = pinctrl_info->npins;
+ ret = sprd_pinctrl_parse_dt(sprd_pctl);
+ if (ret) {
+ dev_err(&pdev->dev, "fail to parse dt properties\n");
+ return ret;
+ }
sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc,
&pdev->dev, (void *)sprd_pctl);
if (IS_ERR(sprd_pctl->pctl)) {
diff --git a/drivers/pinctrl/sprd/pinctrl-sprd.h b/drivers/pinctrl/sprd/pinctrl-sprd.h
index 69544a3cd635..a696f81ce663 100644
--- a/drivers/pinctrl/sprd/pinctrl-sprd.h
+++ b/drivers/pinctrl/sprd/pinctrl-sprd.h
@@ -52,7 +52,8 @@ struct sprd_pins_info {
int sprd_pinctrl_core_probe(struct platform_device *pdev,
struct sprd_pins_info *sprd_soc_pin_info,
- int pins_cnt);
+ int pins_cnt, u32 common_pin_offset,
+ u32 misc_pin_offset);
int sprd_pinctrl_remove(struct platform_device *pdev);
void sprd_pinctrl_shutdown(struct platform_device *pdev);
--
2.17.1On Fri, Aug 25, 2023 at 11:18:21AM +0800, Linhua Xu wrote:
> From: Linhua Xu <Linhua.Xu@unisoc.com>
>
> For UNISOC pin controller, the offset values of the common register and
> misc register will be different. Thus put these in the probe function
> parameters.
...
> +#define PINCTRL_REG_OFFSET 0x20
0x0020
> +#define PINCTRL_REG_MISC_OFFSET 0x4020
...
> if (pin->type == GLOBAL_CTRL_PIN) {
> - pin->reg = (unsigned long)sprd_pctl->base +
> - PINCTRL_REG_LEN * reg;
> + pin->reg = (unsigned long)(sprd_pctl->base +
> + (unsigned long)(PINCTRL_REG_LEN * reg));
Please, make sure you get rid of castings completely. They are weird
for the start and may lead to bugs.
> pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
> pin->bit_width = sprd_soc_pin_info[i].bit_width;
> ctrl_pin++;
> } else if (pin->type == COMMON_PIN) {
> pin->reg = (unsigned long)sprd_pctl->base +
> - PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
> + sprd_pctl->common_pin_offset + PINCTRL_REG_LEN *
> (i - ctrl_pin);
> com_pin++;
> } else if (pin->type == MISC_PIN) {
> pin->reg = (unsigned long)sprd_pctl->base +
> - PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
> + sprd_pctl->misc_pin_offset + PINCTRL_REG_LEN *
> (i - ctrl_pin - com_pin);
> }
Ditto.
--
With Best Regards,
Andy Shevchenko
Hi Linhua,
kernel test robot noticed the following build warnings:
[auto build test WARNING on linusw-pinctrl/devel]
[also build test WARNING on linusw-pinctrl/for-next linus/master v6.5-rc7 next-20230824]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Linhua-Xu/pinctrl-sprd-Modify-the-probe-function-parameters/20230825-113950
base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
patch link: https://lore.kernel.org/r/20230825031826.31599-2-Linhua.xu%40unisoc.com
patch subject: [PATCH 1/6] pinctrl: sprd: Modify the probe function parameters
config: parisc-allyesconfig (https://download.01.org/0day-ci/archive/20230825/202308251318.Xng4apdW-lkp@intel.com/config)
compiler: hppa-linux-gcc (GCC) 13.2.0
reproduce: (https://download.01.org/0day-ci/archive/20230825/202308251318.Xng4apdW-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308251318.Xng4apdW-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/pinctrl/sprd/pinctrl-sprd.c:156: warning: Function parameter or member 'common_pin_offset' not described in 'sprd_pinctrl'
>> drivers/pinctrl/sprd/pinctrl-sprd.c:156: warning: Function parameter or member 'misc_pin_offset' not described in 'sprd_pinctrl'
vim +156 drivers/pinctrl/sprd/pinctrl-sprd.c
41d32cfce1ae61 Baolin Wang 2017-08-17 141
41d32cfce1ae61 Baolin Wang 2017-08-17 142 /**
41d32cfce1ae61 Baolin Wang 2017-08-17 143 * struct sprd_pinctrl: represent the pin controller device
41d32cfce1ae61 Baolin Wang 2017-08-17 144 * @dev: pointer to the device structure
41d32cfce1ae61 Baolin Wang 2017-08-17 145 * @pctl: pointer to the pinctrl handle
41d32cfce1ae61 Baolin Wang 2017-08-17 146 * @base: base address of the controller
41d32cfce1ae61 Baolin Wang 2017-08-17 147 * @info: pointer to SoC's pins description information
41d32cfce1ae61 Baolin Wang 2017-08-17 148 */
41d32cfce1ae61 Baolin Wang 2017-08-17 149 struct sprd_pinctrl {
41d32cfce1ae61 Baolin Wang 2017-08-17 150 struct device *dev;
41d32cfce1ae61 Baolin Wang 2017-08-17 151 struct pinctrl_dev *pctl;
41d32cfce1ae61 Baolin Wang 2017-08-17 152 void __iomem *base;
41d32cfce1ae61 Baolin Wang 2017-08-17 153 struct sprd_pinctrl_soc_info *info;
435130f487a5b7 Linhua Xu 2023-08-25 154 u32 common_pin_offset;
435130f487a5b7 Linhua Xu 2023-08-25 155 u32 misc_pin_offset;
41d32cfce1ae61 Baolin Wang 2017-08-17 @156 };
41d32cfce1ae61 Baolin Wang 2017-08-17 157
--
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