SM6375 comes with a patchlevel=1. Fix the chipid up to reflect that.

Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/gpu/drm/msm/adreno/adreno_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 575e7c56219f..f2d9d34ed50f 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -331,7 +331,7 @@ static const struct adreno_info gpulist[] = {
 		),
 	}, {
 		.machine = "qcom,sm6375",
-		.chip_ids = ADRENO_CHIP_IDS(0x06010900),
+		.chip_ids = ADRENO_CHIP_IDS(0x06010901),
 		.family = ADRENO_6XX_GEN1,
 		.revn = 619,
 		.fw = {

---
base-commit: 6269320850097903b30be8f07a5c61d9f7592393
change-id: 20230825-topic-6375_gpu_id-cf1596e2b147

Best regards,
-- 
Konrad Dybcio <konrad.dybcio@linaro.org>

On Fri, Aug 25, 2023 at 2:11 PM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
> SM6375 comes with a patchlevel=1. Fix the chipid up to reflect that.
>
> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  drivers/gpu/drm/msm/adreno/adreno_device.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
> index 575e7c56219f..f2d9d34ed50f 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
> +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
> @@ -331,7 +331,7 @@ static const struct adreno_info gpulist[] = {
>                 ),
>         }, {
>                 .machine = "qcom,sm6375",
> -               .chip_ids = ADRENO_CHIP_IDS(0x06010900),
> +               .chip_ids = ADRENO_CHIP_IDS(0x06010901),

r-b, but maybe we should list both to be safe?  But unsure if any
patchlevel=0 things are out there in the wild... I guess we could add
it back in later if needed

BR,
-

>                 .family = ADRENO_6XX_GEN1,
>                 .revn = 619,
>                 .fw = {
>
> ---
> base-commit: 6269320850097903b30be8f07a5c61d9f7592393
> change-id: 20230825-topic-6375_gpu_id-cf1596e2b147
>
> Best regards,
> --
> Konrad Dybcio <konrad.dybcio@linaro.org>
>

On 26.08.2023 03:29, Rob Clark wrote:
> On Fri, Aug 25, 2023 at 2:11 PM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>
>> SM6375 comes with a patchlevel=1. Fix the chipid up to reflect that.
>>
>> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>  drivers/gpu/drm/msm/adreno/adreno_device.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
>> index 575e7c56219f..f2d9d34ed50f 100644
>> --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
>> +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
>> @@ -331,7 +331,7 @@ static const struct adreno_info gpulist[] = {
>>                 ),
>>         }, {
>>                 .machine = "qcom,sm6375",
>> -               .chip_ids = ADRENO_CHIP_IDS(0x06010900),
>> +               .chip_ids = ADRENO_CHIP_IDS(0x06010901),
> 
> r-b, but maybe we should list both to be safe?  But unsure if any
> patchlevel=0 things are out there in the wild...
AFAICT only 1 for this soc

Konrad

I guess we could add
> it back in later if needed
> 
> BR,
> -
> 
>>                 .family = ADRENO_6XX_GEN1,
>>                 .revn = 619,
>>                 .fw = {
>>
>> ---
>> base-commit: 6269320850097903b30be8f07a5c61d9f7592393
>> change-id: 20230825-topic-6375_gpu_id-cf1596e2b147
>>
>> Best regards,
>> --
>> Konrad Dybcio <konrad.dybcio@linaro.org>
>>