On Tue, 15 Aug 2023 20:57:11 +0530
Amit Singh Tomar <amitsinght@marvell.com> wrote:
> MPAMF_PRI_IDR_NS[DSPRI_WD] determines the number of implemented bits in
> the downstream priority field (MPAMCFG_PRI_NS). For instance, if the value
> of DSPRI_WD is 4, then the maximum value for dspri is 0xf, and mask should
> be GENMASK(3,0).
>
> But with current implementation, it turned out to be GENMASK(4,0) .i.e.
> 0x1f instead of 0xf.
>
> u16 dspri = GENMASK(rprops->dspri_wd, 0);
>
> Let's fix it, by subtracting 1 from DSPRI_WD value.
>
> Signed-off-by: Amit Singh Tomar <amitsinght@marvell.com>
> ---
> drivers/platform/mpam/mpam_devices.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/mpam_devices.c
> index c0c83c04c77c..59022e42920c 100644
> --- a/drivers/platform/mpam/mpam_devices.c
> +++ b/drivers/platform/mpam/mpam_devices.c
> @@ -1099,7 +1099,7 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
> struct mpam_msc *msc = ris->msc;
> u16 bwa_fract = MPAMCFG_MBW_MAX_MAX;
> struct mpam_props *rprops = &ris->props;
> - u16 dspri = GENMASK(rprops->dspri_wd, 0);
> + u16 dspri = GENMASK((rprops->dspri_wd-1), 0);
Spaces around the -
> u16 intpri = GENMASK(rprops->intpri_wd, 0);
Please fix intpri as well. Argument is the same.
I'm assuming / hoping James will squash this into relevant patch in his tree.
>
> lockdep_assert_held(&msc->lock);