Add binding documentation for Marvell Odyssey DDR PMU.

Signed-off-by: Gowthami Thiagarajan <gthiagarajan@marvell.com>
---

v1->v2
- No change

 .../devicetree/bindings/perf/marvell-cn10k-ddr.yaml      | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
index a18dd0a8c43a..a435cbf4aea0 100644
--- a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
+++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
@@ -11,10 +11,15 @@ maintainers:
 
 properties:
   compatible:
-    items:
+    oneOf:
       - enum:
           - marvell,cn10k-ddr-pmu
-
+          - marvell,odyssey-ddr-pmu
+      - items:
+          - enum:
+              - marvell,cn10k-ddr-pmu
+              - marvell,odyssey-ddr-pmu
+          - const: marvell,cn10k-ddr-pmu
   reg:
     maxItems: 1
 
-- 
2.25.1

On 12/08/2023 16:25, Gowthami Thiagarajan wrote:
> Add binding documentation for Marvell Odyssey DDR PMU.
> 
> Signed-off-by: Gowthami Thiagarajan <gthiagarajan@marvell.com>
> ---
> 
> v1->v2
> - No change
> 
>  .../devicetree/bindings/perf/marvell-cn10k-ddr.yaml      | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
> index a18dd0a8c43a..a435cbf4aea0 100644
> --- a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
> +++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
> @@ -11,10 +11,15 @@ maintainers:
>  
>  properties:
>    compatible:
> -    items:
> +    oneOf:
>        - enum:
>            - marvell,cn10k-ddr-pmu
> -
> +          - marvell,odyssey-ddr-pmu
> +      - items:
> +          - enum:
> +              - marvell,cn10k-ddr-pmu
> +              - marvell,odyssey-ddr-pmu
> +          - const: marvell,cn10k-ddr-pmu

This is absolutely bogus and does not make sense.

marvell,cn10k-ddr-pmu is not compatible with marvell,cn10k-ddr-pmu

Questions about actual name of SoC remain...

>    reg:
>      maxItems: 1
>  

Best regards,
Krzysztof