Hello,

This series adds devicetree node for MAIN CPSW2G instance of CPSW
Ethernet Switch on TI's J721S2 SoC. Also, a devicetree overlay is added
in order to enable MAIN CPSW2G in RGMII-RXID mode using the GESI
Expansion Board connected to the J7 Common-Processor-Board.

Regards,
Siddharth.

---
NOTE: This series is based on linux-next tagged next-20230725.

v2:
https://lore.kernel.org/r/20230710094328.1359377-1-s-vadapalli@ti.com/
Changes since v2:
- Collect Reviewed-by tag from Ravi Gunasekaran <r-gunasekaran@ti.com>.
- Rename main_cpsw_mdio_pins_default and rgmii1_pins_default to:
  main_cpsw_mdio_default_pins and rgmii1_default_pins respectively.
- Rename main-cpsw-mdio-pins-default and rgmii1-pins-default to:
  main-cpsw-mdio-default-pins and rgmii1-default-pins respectively.
- The above changes are performed to follow the updated json-schema
  patch at:
  https://lore.kernel.org/all/169021456020.3622493.10284534202541859578.robh@kernel.org/
- Rebase series on next-20230725.

v1:
https://lore.kernel.org/r/20230529104913.560045-1-s-vadapalli@ti.com/
Changes since v1:
- Rebase series on next-20230710.

RFC:
https://lore.kernel.org/r/20230426105718.118806-1-s-vadapalli@ti.com/
Changes since RFC:
- Add GESI board product link in the device-tree overlay file.

Kishon Vijay Abraham I (2):
  arm64: dts: ti: k3-j721s2-main: Add main CPSW2G devicetree node
  arm64: dts: ti: k3-j721s2: Add overlay to enable main CPSW2G with GESI

 arch/arm64/boot/dts/ti/Makefile               |  2 +
 .../dts/ti/k3-j721s2-evm-gesi-exp-board.dtso  | 85 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi    | 69 +++++++++++++++
 3 files changed, 156 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-gesi-exp-board.dtso

-- 
2.34.1

Hi Siddharth Vadapalli,

On Wed, 26 Jul 2023 12:24:05 +0530, Siddharth Vadapalli wrote:
> This series adds devicetree node for MAIN CPSW2G instance of CPSW
> Ethernet Switch on TI's J721S2 SoC. Also, a devicetree overlay is added
> in order to enable MAIN CPSW2G in RGMII-RXID mode using the GESI
> Expansion Board connected to the J7 Common-Processor-Board.
> 
> Regards,
> Siddharth.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/2] arm64: dts: ti: k3-j721s2-main: Add main CPSW2G devicetree node
      commit: d6ffe1b4b8c1cdc0ae36b6bc65b11d336aecbb72
[2/2] arm64: dts: ti: k3-j721s2: Add overlay to enable main CPSW2G with GESI
      commit: cac04e27f093c3cafdc10c03b6f50e1578ef8cbc

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D