[PATCH v2 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible

Praveenkumar I posted 5 patches 2 years, 7 months ago
There is a newer version of this series
[PATCH v2 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible
Posted by Praveenkumar I 2 years, 7 months ago
IPQ5332 uses TSENS v2.3.3 with combined interrupt. RPM is not
available in the SoC, hence adding new compatible to have the
sensor enablement and calibration function.

This patch also adds nvmem-cell-names for ipq5332

Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
---
[v2]:
	Followed the order for ipq5332 and added nvmem-cell-names.

 .../devicetree/bindings/thermal/qcom-tsens.yaml      | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 27e9e16e6455..cca115906762 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -69,6 +69,7 @@ properties:
 
       - description: v2 of TSENS with combined interrupt
         enum:
+          - qcom,ipq5332-tsens
           - qcom,ipq8074-tsens
 
       - description: v2 of TSENS with combined interrupt
@@ -205,6 +206,15 @@ properties:
           - const: s9_p2_backup
           - const: s10_p1_backup
           - const: s10_p2_backup
+      - items:
+          - const: mode
+          - const: base0
+          - const: base1
+          - pattern: '^s[0-9]+$'
+          - pattern: '^s[0-9]+$'
+          - pattern: '^s[0-9]+$'
+          - pattern: '^s[0-9]+$'
+          - pattern: '^s[0-9]+$'
 
   "#qcom,sensors":
     description:
@@ -266,6 +276,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,ipq5332-tsens
               - qcom,ipq8074-tsens
     then:
       properties:
@@ -281,6 +292,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,ipq5332-tsens
               - qcom,ipq8074-tsens
               - qcom,tsens-v0_1
               - qcom,tsens-v1
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Re: [PATCH v2 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible
Posted by Krzysztof Kozlowski 2 years, 7 months ago
On 12/07/2023 13:35, Praveenkumar I wrote:
> IPQ5332 uses TSENS v2.3.3 with combined interrupt. RPM is not
> available in the SoC, hence adding new compatible to have the
> sensor enablement and calibration function.
> 
> This patch also adds nvmem-cell-names for ipq5332
> 
> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
> ---
> [v2]:
> 	Followed the order for ipq5332 and added nvmem-cell-names.
> 
>  .../devicetree/bindings/thermal/qcom-tsens.yaml      | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> index 27e9e16e6455..cca115906762 100644
> --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
> @@ -69,6 +69,7 @@ properties:
>  
>        - description: v2 of TSENS with combined interrupt
>          enum:
> +          - qcom,ipq5332-tsens
>            - qcom,ipq8074-tsens
>  
>        - description: v2 of TSENS with combined interrupt
> @@ -205,6 +206,15 @@ properties:
>            - const: s9_p2_backup
>            - const: s10_p1_backup
>            - const: s10_p2_backup
> +      - items:
> +          - const: mode
> +          - const: base0
> +          - const: base1
> +          - pattern: '^s[0-9]+$'
> +          - pattern: '^s[0-9]+$'
> +          - pattern: '^s[0-9]+$'
> +          - pattern: '^s[0-9]+$'
> +          - pattern: '^s[0-9]+$'

Previously there were 17 items here. What changed?

Best regards,
Krzysztof
Re: [PATCH v2 2/5] dt-bindings: thermal: tsens: Add ipq5332 compatible
Posted by Praveenkumar I 2 years, 7 months ago
On 7/12/2023 7:55 PM, Krzysztof Kozlowski wrote:
> On 12/07/2023 13:35, Praveenkumar I wrote:
>> IPQ5332 uses TSENS v2.3.3 with combined interrupt. RPM is not
>> available in the SoC, hence adding new compatible to have the
>> sensor enablement and calibration function.
>>
>> This patch also adds nvmem-cell-names for ipq5332
>>
>> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
>> ---
>> [v2]:
>> 	Followed the order for ipq5332 and added nvmem-cell-names.
>>
>>   .../devicetree/bindings/thermal/qcom-tsens.yaml      | 12 ++++++++++++
>>   1 file changed, 12 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
>> index 27e9e16e6455..cca115906762 100644
>> --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
>> +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
>> @@ -69,6 +69,7 @@ properties:
>>   
>>         - description: v2 of TSENS with combined interrupt
>>           enum:
>> +          - qcom,ipq5332-tsens
>>             - qcom,ipq8074-tsens
>>   
>>         - description: v2 of TSENS with combined interrupt
>> @@ -205,6 +206,15 @@ properties:
>>             - const: s9_p2_backup
>>             - const: s10_p1_backup
>>             - const: s10_p2_backup
>> +      - items:
>> +          - const: mode
>> +          - const: base0
>> +          - const: base1
>> +          - pattern: '^s[0-9]+$'
>> +          - pattern: '^s[0-9]+$'
>> +          - pattern: '^s[0-9]+$'
>> +          - pattern: '^s[0-9]+$'
>> +          - pattern: '^s[0-9]+$'
> Previously there were 17 items here. What changed?
Previously I have added all the available sensor offsets in QFPROM. But 
in IPQ5332,only 5 sensors are present.
Other sensors not present/wired in the SoC, hence updated only for 5 
sensors now.

--
Thanks,
Praveenkumar
>
> Best regards,
> Krzysztof
>