ARM: dts: stm32: leverage OP-TEE ASync notif on STM32MP13x Soc family

[PATCH] ARM: dts: stm32: leverage OP-TEE ASync notif on STM32MP13x Soc family

Posted by Etienne Carriere 2 years, 7 months ago

Enables use of GIC PPI#15 for OP-TEE asynchronous notifications
on stm32mp13 platforms.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
---
 arch/arm/boot/dts/st/stm32mp131.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index d163c267e34c..02f872b99f1d 100644
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -33,6 +33,8 @@ firmware {
 		optee {
 			method = "smc";
 			compatible = "linaro,optee-tz";
+			interrupt-parent = <&intc>;
+			interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 		};
 
 		scmi: scmi {
-- 
2.25.1

Re: [PATCH] ARM: dts: stm32: leverage OP-TEE ASync notif on STM32MP13x Soc family

Posted by Alexandre TORGUE 2 years, 7 months ago

Hi Etienne

On 7/10/23 17:05, Etienne Carriere wrote:
> Enables use of GIC PPI#15 for OP-TEE asynchronous notifications
> on stm32mp13 platforms.
> 
> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
> ---
>   arch/arm/boot/dts/st/stm32mp131.dtsi | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
> index d163c267e34c..02f872b99f1d 100644
> --- a/arch/arm/boot/dts/st/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
> @@ -33,6 +33,8 @@ firmware {
>   		optee {
>   			method = "smc";
>   			compatible = "linaro,optee-tz";
> +			interrupt-parent = <&intc>;
> +			interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
>   		};
>   
>   		scmi: scmi {

Applied on stm32-next.

Thanks.
Alex