Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path.
Allow such case.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
.../bindings/serial/qcom,serial-geni-qcom.yaml | 26 +++++++++++++++-------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
index dd33794b3534..a0acba57bc06 100644
--- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
+++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
@@ -25,14 +25,6 @@ properties:
clock-names:
const: se
- interconnects:
- maxItems: 2
-
- interconnect-names:
- items:
- - const: qup-core
- - const: qup-config
-
interrupts:
minItems: 1
items:
@@ -56,6 +48,24 @@ properties:
reg:
maxItems: 1
+oneOf:
+ - properties:
+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ items:
+ - const: qup-config
+
+ - properties:
+ interconnects:
+ minItems: 2
+
+ interconnect-names:
+ items:
+ - const: qup-core
+ - const: qup-config
+
required:
- compatible
- clocks
--
2.41.0On 03/07/2023 15:31, Konrad Dybcio wrote: > Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. > Allow such case. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > .../bindings/serial/qcom,serial-geni-qcom.yaml | 26 +++++++++++++++------- > 1 file changed, 18 insertions(+), 8 deletions(-) > > diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml > index dd33794b3534..a0acba57bc06 100644 > --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml > +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml > @@ -25,14 +25,6 @@ properties: > clock-names: > const: se > > - interconnects: > - maxItems: 2 > - > - interconnect-names: > - items: > - - const: qup-core > - - const: qup-config Instead please keep the definition of the fields in top-level properties with the widest constraints, e.g. interconnects: minItems: 1 maxItems: 2 interconnect-names: minItems: 1 items: - const: qup-core - const: qup-config If there was allOf:if:then per variant, this could be further customized. Best regards, Krzysztof
On 3.07.2023 16:01, Krzysztof Kozlowski wrote: > On 03/07/2023 15:31, Konrad Dybcio wrote: >> Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. >> Allow such case. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> .../bindings/serial/qcom,serial-geni-qcom.yaml | 26 +++++++++++++++------- >> 1 file changed, 18 insertions(+), 8 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml >> index dd33794b3534..a0acba57bc06 100644 >> --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml >> +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml >> @@ -25,14 +25,6 @@ properties: >> clock-names: >> const: se >> >> - interconnects: >> - maxItems: 2 >> - >> - interconnect-names: >> - items: >> - - const: qup-core >> - - const: qup-config > > Instead please keep the definition of the fields in top-level properties > with the widest constraints, e.g. > interconnects: > minItems: 1 > maxItems: 2 > > interconnect-names: > minItems: 1 > items: > - const: qup-core > - const: qup-config Sadly the issue here is that the qup-config path exists, but qup-core doesn't. Konrad > > If there was allOf:if:then per variant, this could be further customized. > > Best regards, > Krzysztof >
On 03/07/2023 16:38, Konrad Dybcio wrote:
> On 3.07.2023 16:01, Krzysztof Kozlowski wrote:
>> On 03/07/2023 15:31, Konrad Dybcio wrote:
>>> Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path.
>>> Allow such case.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>>> ---
>>> .../bindings/serial/qcom,serial-geni-qcom.yaml | 26 +++++++++++++++-------
>>> 1 file changed, 18 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
>>> index dd33794b3534..a0acba57bc06 100644
>>> --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
>>> +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
>>> @@ -25,14 +25,6 @@ properties:
>>> clock-names:
>>> const: se
>>>
>>> - interconnects:
>>> - maxItems: 2
>>> -
>>> - interconnect-names:
>>> - items:
>>> - - const: qup-core
>>> - - const: qup-config
>>
>> Instead please keep the definition of the fields in top-level properties
>> with the widest constraints, e.g.
>> interconnects:
>> minItems: 1
>> maxItems: 2
>>
>> interconnect-names:
>> minItems: 1
>> items:
>> - const: qup-core
>> - const: qup-config
> Sadly the issue here is that the qup-config path exists, but qup-core
> doesn't.
Ah, right, then:
interconnect-names:
oneOf:
- items:
....
- items:
...
Best regards,
Krzysztof
On Mon, 03 Jul 2023 15:31:11 +0200, Konrad Dybcio wrote:
> Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path.
> Allow such case.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> .../bindings/serial/qcom,serial-geni-qcom.yaml | 26 +++++++++++++++-------
> 1 file changed, 18 insertions(+), 8 deletions(-)
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.example.dtb: geniqup@8c0000: serial@a88000: More than one condition true in oneOf schema:
{'$filename': '/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml',
'$id': 'http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#',
'$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
'allOf': [{'$ref': '/schemas/serial/serial.yaml#'},
{'oneOf': [{'required': ['interrupts']},
{'required': ['interrupts-extended']}]}],
'oneOf': [{'patternProperties': {'pinctrl-[0-9]+': True},
'properties': {'$nodename': True,
'bootph-all': True,
'bootph-pre-ram': True,
'bootph-pre-sram': True,
'bootph-some-ram': True,
'bootph-verify': True,
'interconnect-names': {'items': [{'const': 'qup-config'}],
'maxItems': 1,
'minItems': 1,
'type': 'array'},
'interconnects': {'maxItems': 1,
'minItems': 1},
'phandle': True,
'pinctrl-names': True,
'secure-status': True,
'status': True}},
{'patternProperties': {'pinctrl-[0-9]+': True},
'properties': {'$nodename': True,
'bootph-all': True,
'bootph-pre-ram': True,
'bootph-pre-sram': True,
'bootph-some-ram': True,
'bootph-verify': True,
'interconnect-names': {'items': [{'const': 'qup-core'},
{'const': 'qup-config'}],
'maxItems': 2,
'minItems': 2,
'type': 'array'},
'interconnects': {'maxItems': 2,
'minItems': 2},
'phandle': True,
'pinctrl-names': True,
'secure-status': True,
'status': True}}],
'properties': {'$nodename': True,
'assigned-clock-parents': True,
'assigned-clock-rates': True,
'assigned-clocks': True,
'bootph-all': True,
'bootph-pre-ram': True,
'bootph-pre-sram': True,
'bootph-some-ram': True,
'bootph-verify': True,
'clock-names': {'items': [{'const': 'se'}],
'maxItems': 1,
'minItems': 1,
'type': 'array'},
'clocks': {'maxItems': 1, 'minItems': 1},
'compatible': {'items': [{'enum': ['qcom,geni-uart',
'qcom,geni-debug-uart']}],
'maxItems': 1,
'minItems': 1,
'type': 'array'},
'interrupt-parent': True,
'interrupts': {'maxItems': 2,
'minItems': 1,
'type': 'array'},
'interrupts-extended': {'maxItems': 2,
'minItems': 1,
'type': 'array'},
'operating-points-v2': True,
'phandle': True,
'pinctrl-0': True,
'pinctrl-1': True,
'pinctrl-names': {'items': [{'const': 'default'},
{'const': 'sleep'}],
'maxItems': 2,
'minItems': 1,
'type': 'array'},
'power-domains': {'maxItems': 1, 'minItems': 1},
'reg': {'maxItems': 1, 'minItems': 1},
'secure-status': True,
'status': True},
'required': ['compatible', 'clocks', 'clock-names', 'reg'],
'select': {'properties': {'compatible': {'contains': {'enum': ['qcom,geni-debug-uart',
'qcom,geni-uart']}}},
'required': ['compatible']},
'title': 'Qualcomm Geni based QUP UART interface',
'type': 'object',
'unevaluatedProperties': False}
from schema $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.example.dtb: serial@a88000: More than one condition true in oneOf schema:
{'$filename': '/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml',
'$id': 'http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#',
'$schema': 'http://devicetree.org/meta-schemas/core.yaml#',
'allOf': [{'$ref': '/schemas/serial/serial.yaml#'},
{'oneOf': [{'required': ['interrupts']},
{'required': ['interrupts-extended']}]}],
'oneOf': [{'patternProperties': {'pinctrl-[0-9]+': True},
'properties': {'$nodename': True,
'bootph-all': True,
'bootph-pre-ram': True,
'bootph-pre-sram': True,
'bootph-some-ram': True,
'bootph-verify': True,
'interconnect-names': {'items': [{'const': 'qup-config'}],
'maxItems': 1,
'minItems': 1,
'type': 'array'},
'interconnects': {'maxItems': 1,
'minItems': 1},
'phandle': True,
'pinctrl-names': True,
'secure-status': True,
'status': True}},
{'patternProperties': {'pinctrl-[0-9]+': True},
'properties': {'$nodename': True,
'bootph-all': True,
'bootph-pre-ram': True,
'bootph-pre-sram': True,
'bootph-some-ram': True,
'bootph-verify': True,
'interconnect-names': {'items': [{'const': 'qup-core'},
{'const': 'qup-config'}],
'maxItems': 2,
'minItems': 2,
'type': 'array'},
'interconnects': {'maxItems': 2,
'minItems': 2},
'phandle': True,
'pinctrl-names': True,
'secure-status': True,
'status': True}}],
'properties': {'$nodename': True,
'assigned-clock-parents': True,
'assigned-clock-rates': True,
'assigned-clocks': True,
'bootph-all': True,
'bootph-pre-ram': True,
'bootph-pre-sram': True,
'bootph-some-ram': True,
'bootph-verify': True,
'clock-names': {'items': [{'const': 'se'}],
'maxItems': 1,
'minItems': 1,
'type': 'array'},
'clocks': {'maxItems': 1, 'minItems': 1},
'compatible': {'items': [{'enum': ['qcom,geni-uart',
'qcom,geni-debug-uart']}],
'maxItems': 1,
'minItems': 1,
'type': 'array'},
'interrupt-parent': True,
'interrupts': {'maxItems': 2,
'minItems': 1,
'type': 'array'},
'interrupts-extended': {'maxItems': 2,
'minItems': 1,
'type': 'array'},
'operating-points-v2': True,
'phandle': True,
'pinctrl-0': True,
'pinctrl-1': True,
'pinctrl-names': {'items': [{'const': 'default'},
{'const': 'sleep'}],
'maxItems': 2,
'minItems': 1,
'type': 'array'},
'power-domains': {'maxItems': 1, 'minItems': 1},
'reg': {'maxItems': 1, 'minItems': 1},
'secure-status': True,
'status': True},
'required': ['compatible', 'clocks', 'clock-names', 'reg'],
'select': {'properties': {'compatible': {'contains': {'enum': ['qcom,geni-debug-uart',
'qcom,geni-uart']}}},
'required': ['compatible']},
'title': 'Qualcomm Geni based QUP UART interface',
'type': 'object',
'unevaluatedProperties': False}
from schema $id: http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230703-topic-8250_qup_icc-v1-2-fea39aa07525@linaro.org
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
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