- Register functions to enable/disable clock and reuse them
to simplify the code
- Check if the component is defined before using it since
some modules are MT8188 only (ex. PADDING)
- Control components according to its type rather than ID
- Use a for-loop to add/remove components in an arrays,
so we only has to maintain the array to make sure every
component will be initialized properly
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 154 +++++++-----------
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 20 ++-
2 files changed, 79 insertions(+), 95 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
index 38f389471f66..f73a558dcf93 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
@@ -51,7 +51,9 @@ enum mtk_ovl_adaptor_comp_id {
struct ovl_adaptor_comp_match {
enum mtk_ovl_adaptor_comp_type type;
+ enum mtk_ddp_comp_id comp_id;
int alias_id;
+ const struct mtk_ddp_comp_funcs *funcs;
};
struct mtk_disp_ovl_adaptor {
@@ -66,20 +68,35 @@ static const char * const private_comp_stem[OVL_ADAPTOR_TYPE_NUM] = {
[OVL_ADAPTOR_TYPE_MERGE] = "merge",
};
+static const struct mtk_ddp_comp_funcs _ethdr = {
+ .clk_enable = mtk_ethdr_clk_enable,
+ .clk_disable = mtk_ethdr_clk_disable,
+};
+
+static const struct mtk_ddp_comp_funcs _merge = {
+ .clk_enable = mtk_merge_clk_enable,
+ .clk_disable = mtk_merge_clk_disable,
+};
+
+static const struct mtk_ddp_comp_funcs _rdma = {
+ .clk_enable = mtk_mdp_rdma_clk_enable,
+ .clk_disable = mtk_mdp_rdma_clk_disable,
+};
+
static const struct ovl_adaptor_comp_match comp_matches[OVL_ADAPTOR_ID_MAX] = {
- [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, 0 },
- [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 0 },
- [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 1 },
- [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 2 },
- [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 3 },
- [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 4 },
- [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 5 },
- [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 6 },
- [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 7 },
- [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE, 1 },
- [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, 2 },
- [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, 3 },
- [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, 4 },
+ [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, DDP_COMPONENT_ETHDR_MIXER, 0, &_ethdr },
+ [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA0, 0, &_rdma },
+ [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA1, 1, &_rdma },
+ [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA2, 2, &_rdma },
+ [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA3, 3, &_rdma },
+ [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA4, 4, &_rdma },
+ [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA5, 5, &_rdma },
+ [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA6, 6, &_rdma },
+ [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA7, 7, &_rdma },
+ [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE1, 1, &_merge },
+ [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE2, 2, &_merge },
+ [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE3, 3, &_merge },
+ [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE4, 4, &_merge },
};
void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx,
@@ -185,73 +202,34 @@ void mtk_ovl_adaptor_stop(struct device *dev)
int mtk_ovl_adaptor_clk_enable(struct device *dev)
{
- struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
- struct device *comp;
- int ret;
int i;
-
- for (i = 0; i < OVL_ADAPTOR_MERGE0; i++) {
- comp = ovl_adaptor->ovl_adaptor_comp[i];
- ret = pm_runtime_get_sync(comp);
- if (ret < 0) {
- dev_err(dev, "Failed to enable power domain %d, err %d\n", i, ret);
- goto pwr_err;
- }
- }
+ int ret;
+ struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
- comp = ovl_adaptor->ovl_adaptor_comp[i];
-
- if (i < OVL_ADAPTOR_MERGE0)
- ret = mtk_mdp_rdma_clk_enable(comp);
- else if (i < OVL_ADAPTOR_ETHDR0)
- ret = mtk_merge_clk_enable(comp);
- else
- ret = mtk_ethdr_clk_enable(comp);
+ dev = ovl_adaptor->ovl_adaptor_comp[i];
+ if (!dev)
+ continue;
+ ret = comp_matches[i].funcs->clk_enable(dev);
if (ret) {
- dev_err(dev, "Failed to enable clock %d, err %d\n", i, ret);
- goto clk_err;
+ while (--i >= 0)
+ comp_matches[i].funcs->clk_disable(dev);
+ return ret;
}
}
-
- return ret;
-
-clk_err:
- while (--i >= 0) {
- comp = ovl_adaptor->ovl_adaptor_comp[i];
- if (i < OVL_ADAPTOR_MERGE0)
- mtk_mdp_rdma_clk_disable(comp);
- else if (i < OVL_ADAPTOR_ETHDR0)
- mtk_merge_clk_disable(comp);
- else
- mtk_ethdr_clk_disable(comp);
- }
- i = OVL_ADAPTOR_MERGE0;
-
-pwr_err:
- while (--i >= 0)
- pm_runtime_put(ovl_adaptor->ovl_adaptor_comp[i]);
-
- return ret;
+ return 0;
}
void mtk_ovl_adaptor_clk_disable(struct device *dev)
{
- struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
- struct device *comp;
int i;
+ struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
- comp = ovl_adaptor->ovl_adaptor_comp[i];
-
- if (i < OVL_ADAPTOR_MERGE0) {
- mtk_mdp_rdma_clk_disable(comp);
- pm_runtime_put(comp);
- } else if (i < OVL_ADAPTOR_ETHDR0) {
- mtk_merge_clk_disable(comp);
- } else {
- mtk_ethdr_clk_disable(comp);
- }
+ dev = ovl_adaptor->ovl_adaptor_comp[i];
+ if (!dev)
+ continue;
+ comp_matches[i].funcs->clk_disable(dev);
}
}
@@ -313,36 +291,26 @@ size_t mtk_ovl_adaptor_get_num_formats(struct device *dev)
void mtk_ovl_adaptor_add_comp(struct device *dev, struct mtk_mutex *mutex)
{
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_ETHDR_MIXER);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA0);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA1);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA2);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA3);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA4);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA5);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA6);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA7);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE1);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE2);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE3);
- mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE4);
+ int i;
+ struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
+
+ for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
+ if (!ovl_adaptor->ovl_adaptor_comp[i])
+ continue;
+ mtk_mutex_add_comp(mutex, comp_matches[i].comp_id);
+ }
}
void mtk_ovl_adaptor_remove_comp(struct device *dev, struct mtk_mutex *mutex)
{
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_ETHDR_MIXER);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA0);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA1);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA2);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA3);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA4);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA5);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA6);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA7);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE1);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE2);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE3);
- mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE4);
+ int i;
+ struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
+
+ for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
+ if (!ovl_adaptor->ovl_adaptor_comp[i])
+ continue;
+ mtk_mutex_remove_comp(mutex, comp_matches[i].comp_id);
+ }
}
void mtk_ovl_adaptor_connect(struct device *dev, struct device *mmsys_dev, unsigned int next)
diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c
index e06db6e56b5f..a37146544e30 100644
--- a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c
@@ -245,10 +245,23 @@ size_t mtk_mdp_rdma_get_num_formats(struct device *dev)
int mtk_mdp_rdma_clk_enable(struct device *dev)
{
+ int ret;
struct mtk_mdp_rdma *rdma = dev_get_drvdata(dev);
- clk_prepare_enable(rdma->clk);
- return 0;
+ /*
+ * Since LARBs (Local ARBiter) have to be powered on before its users,
+ * to ensure the power-on sequence, we created device link between
+ * RDMA and its LARB, and when pm_runtime_get_sync is called in RDMA,
+ * system will make sure the LARB is powered on, then the RDMA
+ */
+ ret = pm_runtime_get_sync(dev);
+
+ if (ret < 0)
+ dev_err(dev, "pm_runtime_get_sync failed: %d\n", ret);
+ else
+ ret = clk_prepare_enable(rdma->clk);
+
+ return ret;
}
void mtk_mdp_rdma_clk_disable(struct device *dev)
@@ -256,6 +269,9 @@ void mtk_mdp_rdma_clk_disable(struct device *dev)
struct mtk_mdp_rdma *rdma = dev_get_drvdata(dev);
clk_disable_unprepare(rdma->clk);
+
+ /* Same reason as when enabling clock, turn the LARB off */
+ pm_runtime_put(dev);
}
static int mtk_mdp_rdma_bind(struct device *dev, struct device *master,
--
2.18.0
Hi, Hsiao-chien: On Tue, 2023-06-27 at 14:39 +0800, Hsiao Chien Sung wrote: > - Register functions to enable/disable clock and reuse them > to simplify the code > - Check if the component is defined before using it since > some modules are MT8188 only (ex. PADDING) > - Control components according to its type rather than ID > - Use a for-loop to add/remove components in an arrays, > so we only has to maintain the array to make sure every > component will be initialized properly Separate each modification into one patch. Regards, CK > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > --- > .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 154 +++++++--------- > -- > drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 20 ++- > 2 files changed, 79 insertions(+), 95 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > index 38f389471f66..f73a558dcf93 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > @@ -51,7 +51,9 @@ enum mtk_ovl_adaptor_comp_id { > > struct ovl_adaptor_comp_match { > enum mtk_ovl_adaptor_comp_type type; > + enum mtk_ddp_comp_id comp_id; > int alias_id; > + const struct mtk_ddp_comp_funcs *funcs; > }; > > struct mtk_disp_ovl_adaptor { > @@ -66,20 +68,35 @@ static const char * const > private_comp_stem[OVL_ADAPTOR_TYPE_NUM] = { > [OVL_ADAPTOR_TYPE_MERGE] = "merge", > }; > > +static const struct mtk_ddp_comp_funcs _ethdr = { > + .clk_enable = mtk_ethdr_clk_enable, > + .clk_disable = mtk_ethdr_clk_disable, > +}; > + > +static const struct mtk_ddp_comp_funcs _merge = { > + .clk_enable = mtk_merge_clk_enable, > + .clk_disable = mtk_merge_clk_disable, > +}; > + > +static const struct mtk_ddp_comp_funcs _rdma = { > + .clk_enable = mtk_mdp_rdma_clk_enable, > + .clk_disable = mtk_mdp_rdma_clk_disable, > +}; > + > static const struct ovl_adaptor_comp_match > comp_matches[OVL_ADAPTOR_ID_MAX] = { > - [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, 0 }, > - [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 0 }, > - [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 1 }, > - [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 2 }, > - [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 3 }, > - [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 4 }, > - [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 5 }, > - [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 6 }, > - [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 7 }, > - [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE, 1 }, > - [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, 2 }, > - [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, 3 }, > - [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, 4 }, > + [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, > DDP_COMPONENT_ETHDR_MIXER, 0, &_ethdr }, > + [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA0, 0, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA1, 1, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA2, 2, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA3, 3, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA4, 4, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA5, 5, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA6, 6, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA, > DDP_COMPONENT_MDP_RDMA7, 7, &_rdma }, > + [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE, > DDP_COMPONENT_MERGE1, 1, &_merge }, > + [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, > DDP_COMPONENT_MERGE2, 2, &_merge }, > + [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, > DDP_COMPONENT_MERGE3, 3, &_merge }, > + [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, > DDP_COMPONENT_MERGE4, 4, &_merge }, > }; > > void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int > idx, > @@ -185,73 +202,34 @@ void mtk_ovl_adaptor_stop(struct device *dev) > > int mtk_ovl_adaptor_clk_enable(struct device *dev) > { > - struct mtk_disp_ovl_adaptor *ovl_adaptor = > dev_get_drvdata(dev); > - struct device *comp; > - int ret; > int i; > - > - for (i = 0; i < OVL_ADAPTOR_MERGE0; i++) { > - comp = ovl_adaptor->ovl_adaptor_comp[i]; > - ret = pm_runtime_get_sync(comp); > - if (ret < 0) { > - dev_err(dev, "Failed to enable power domain %d, > err %d\n", i, ret); > - goto pwr_err; > - } > - } > + int ret; > + struct mtk_disp_ovl_adaptor *ovl_adaptor = > dev_get_drvdata(dev); > > for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) { > - comp = ovl_adaptor->ovl_adaptor_comp[i]; > - > - if (i < OVL_ADAPTOR_MERGE0) > - ret = mtk_mdp_rdma_clk_enable(comp); > - else if (i < OVL_ADAPTOR_ETHDR0) > - ret = mtk_merge_clk_enable(comp); > - else > - ret = mtk_ethdr_clk_enable(comp); > + dev = ovl_adaptor->ovl_adaptor_comp[i]; > + if (!dev) > + continue; > + ret = comp_matches[i].funcs->clk_enable(dev); > if (ret) { > - dev_err(dev, "Failed to enable clock %d, err > %d\n", i, ret); > - goto clk_err; > + while (--i >= 0) > + comp_matches[i].funcs- > >clk_disable(dev); > + return ret; > } > } > - > - return ret; > - > -clk_err: > - while (--i >= 0) { > - comp = ovl_adaptor->ovl_adaptor_comp[i]; > - if (i < OVL_ADAPTOR_MERGE0) > - mtk_mdp_rdma_clk_disable(comp); > - else if (i < OVL_ADAPTOR_ETHDR0) > - mtk_merge_clk_disable(comp); > - else > - mtk_ethdr_clk_disable(comp); > - } > - i = OVL_ADAPTOR_MERGE0; > - > -pwr_err: > - while (--i >= 0) > - pm_runtime_put(ovl_adaptor->ovl_adaptor_comp[i]); > - > - return ret; > + return 0; > } > > void mtk_ovl_adaptor_clk_disable(struct device *dev) > { > - struct mtk_disp_ovl_adaptor *ovl_adaptor = > dev_get_drvdata(dev); > - struct device *comp; > int i; > + struct mtk_disp_ovl_adaptor *ovl_adaptor = > dev_get_drvdata(dev); > > for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) { > - comp = ovl_adaptor->ovl_adaptor_comp[i]; > - > - if (i < OVL_ADAPTOR_MERGE0) { > - mtk_mdp_rdma_clk_disable(comp); > - pm_runtime_put(comp); > - } else if (i < OVL_ADAPTOR_ETHDR0) { > - mtk_merge_clk_disable(comp); > - } else { > - mtk_ethdr_clk_disable(comp); > - } > + dev = ovl_adaptor->ovl_adaptor_comp[i]; > + if (!dev) > + continue; > + comp_matches[i].funcs->clk_disable(dev); > } > } > > @@ -313,36 +291,26 @@ size_t mtk_ovl_adaptor_get_num_formats(struct > device *dev) > > void mtk_ovl_adaptor_add_comp(struct device *dev, struct mtk_mutex > *mutex) > { > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_ETHDR_MIXER); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA0); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA1); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA2); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA3); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA4); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA5); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA6); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA7); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE1); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE2); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE3); > - mtk_mutex_add_comp(mutex, DDP_COMPONENT_MERGE4); > + int i; > + struct mtk_disp_ovl_adaptor *ovl_adaptor = > dev_get_drvdata(dev); > + > + for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) { > + if (!ovl_adaptor->ovl_adaptor_comp[i]) > + continue; > + mtk_mutex_add_comp(mutex, comp_matches[i].comp_id); > + } > } > > void mtk_ovl_adaptor_remove_comp(struct device *dev, struct > mtk_mutex *mutex) > { > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_ETHDR_MIXER); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA0); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA1); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA2); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA3); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA4); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA5); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA6); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MDP_RDMA7); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE1); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE2); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE3); > - mtk_mutex_remove_comp(mutex, DDP_COMPONENT_MERGE4); > + int i; > + struct mtk_disp_ovl_adaptor *ovl_adaptor = > dev_get_drvdata(dev); > + > + for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) { > + if (!ovl_adaptor->ovl_adaptor_comp[i]) > + continue; > + mtk_mutex_remove_comp(mutex, comp_matches[i].comp_id); > + } > } > > void mtk_ovl_adaptor_connect(struct device *dev, struct device > *mmsys_dev, unsigned int next) > diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c > b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c > index e06db6e56b5f..a37146544e30 100644 > --- a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c > +++ b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c > @@ -245,10 +245,23 @@ size_t mtk_mdp_rdma_get_num_formats(struct > device *dev) > > int mtk_mdp_rdma_clk_enable(struct device *dev) > { > + int ret; > struct mtk_mdp_rdma *rdma = dev_get_drvdata(dev); > > - clk_prepare_enable(rdma->clk); > - return 0; > + /* > + * Since LARBs (Local ARBiter) have to be powered on before its > users, > + * to ensure the power-on sequence, we created device link > between > + * RDMA and its LARB, and when pm_runtime_get_sync is called in > RDMA, > + * system will make sure the LARB is powered on, then the RDMA > + */ > + ret = pm_runtime_get_sync(dev); > + > + if (ret < 0) > + dev_err(dev, "pm_runtime_get_sync failed: %d\n", ret); > + else > + ret = clk_prepare_enable(rdma->clk); > + > + return ret; > } > > void mtk_mdp_rdma_clk_disable(struct device *dev) > @@ -256,6 +269,9 @@ void mtk_mdp_rdma_clk_disable(struct device *dev) > struct mtk_mdp_rdma *rdma = dev_get_drvdata(dev); > > clk_disable_unprepare(rdma->clk); > + > + /* Same reason as when enabling clock, turn the LARB off */ > + pm_runtime_put(dev); > } > > static int mtk_mdp_rdma_bind(struct device *dev, struct device > *master,
On 27/06/2023 08:39, Hsiao Chien Sung wrote: > - Register functions to enable/disable clock and reuse them > to simplify the code > - Check if the component is defined before using it since > some modules are MT8188 only (ex. PADDING) > - Control components according to its type rather than ID > - Use a for-loop to add/remove components in an arrays, > so we only has to maintain the array to make sure every > component will be initialized properly > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > --- > .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 154 +++++++----------- > drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 20 ++- > 2 files changed, 79 insertions(+), 95 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > index 38f389471f66..f73a558dcf93 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > @@ -51,7 +51,9 @@ enum mtk_ovl_adaptor_comp_id { > ... snip ... > +}; > + > static const struct ovl_adaptor_comp_match comp_matches[OVL_ADAPTOR_ID_MAX] = { > - [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, 0 }, > - [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 0 }, > - [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 1 }, > - [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 2 }, > - [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 3 }, > - [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 4 }, > - [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 5 }, > - [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 6 }, > - [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA, 7 }, > - [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE, 1 }, > - [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, 2 }, > - [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, 3 }, > - [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, 4 }, > + [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, DDP_COMPONENT_ETHDR_MIXER, 0, &_ethdr }, > + [OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA0, 0, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA1, 1, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA2, 2, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA3, 3, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA4, 4, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA5, 5, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA6, 6, &_rdma }, > + [OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA, DDP_COMPONENT_MDP_RDMA7, 7, &_rdma }, > + [OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE1, 1, &_merge }, > + [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE2, 2, &_merge }, > + [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE3, 3, &_merge }, > + [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE4, 4, &_merge }, The lines is > 80 columns. https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings > }; > > void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, > @@ -185,73 +202,34 @@ void mtk_ovl_adaptor_stop(struct device *dev) > > int mtk_ovl_adaptor_clk_enable(struct device *dev) > { > - struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev); > - struct device *comp; > - int ret; -- Regards, Alexandre
On Tue, Jun 27, 2023 at 9:48 PM Alexandre Mergnat <amergnat@baylibre.com> wrote: > snip > > The lines is > 80 columns. > > https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings The 80-column convention is preferred but I think this provides better readability. Also checkpatch.pl allows up to 100 columns today and the lines fit in. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=bdc48fa11e46f Regards, Fei
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