This patch add support for Coresight dummy source and dummy sink trace.
Signed-off-by: Hao Zhang <quic_hazha@quicinc.com>
---
.../arm/arm,coresight-dummy-sink.yaml | 73 +++++++++++++++++++
.../arm/arm,coresight-dummy-source.yaml | 71 ++++++++++++++++++
2 files changed, 144 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
new file mode 100644
index 000000000000..cb78cfa56702
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Coresight Dummy sink component
+
+description: |
+ CoreSight components are compliant with the ARM CoreSight architecture
+ specification and can be connected in various topologies to suit a particular
+ SoCs tracing needs. These trace components can generally be classified as
+ sinks, links and sources. Trace data produced by one or more sources flows
+ through the intermediate links connecting the source to the currently selected
+ sink.
+
+ The Coresight dummy sink component is for the specific coresight sink devices
+ kernel don't have permission to access or configure, e.g., CoreSight EUD on
+ Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
+ debug and trace capabilities. For this device, a dummy driver is needed to
+ register it as Coresight sink device in kernel side, so that path can be
+ created in the driver. Then the trace flow would be transferred to EUD via
+ coresight link of AP processor. It provides Coresight API for operations on
+ dummy source devices, such as enabling and disabling them. It also provides
+ the Coresight dummy source paths for debugging.
+
+ The primary use case of the coresight dummy sink is to build path in kernel
+ side for dummy sink component.
+
+maintainers:
+ - Mike Leach <mike.leach@linaro.org>
+ - Suzuki K Poulose <suzuki.poulose@arm.com>
+ - James Clark <james.clark@arm.com>
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Hao Zhang <quic_hazha@quicinc.com>
+
+properties:
+ compatible:
+ enum:
+ - arm,coresight-dummy-sink
+
+ in-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: Input connection from the Coresight Trace bus to
+ dummy sink, such as Embedded USB debugger(EUD).
+
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - in-ports
+
+additionalProperties: false
+
+examples:
+ # Minimum dummy sink definition. Dummy sink connect to coresight replicator.
+ - |
+ sink {
+ compatible = "arm,coresight-dummy-sink";
+
+ in-ports {
+ port {
+ eud_in_replicator_swao: endpoint {
+ remote-endpoint = <&replicator_swao_out_eud>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
new file mode 100644
index 000000000000..5fedaed49a1f
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Coresight Dummy source component
+
+description: |
+ CoreSight components are compliant with the ARM CoreSight architecture
+ specification and can be connected in various topologies to suit a particular
+ SoCs tracing needs. These trace components can generally be classified as
+ sinks, links and sources. Trace data produced by one or more sources flows
+ through the intermediate links connecting the source to the currently selected
+ sink.
+
+ The Coresight dummy source component is for the specific coresight source
+ devices kernel don't have permission to access or configure. For some SOCs,
+ there would be Coresight source trace components on sub-processor which
+ are conneted to AP processor via debug bus. For these devices, a dummy driver
+ is needed to register them as Coresight source devices, so that paths can be
+ created in the driver. It provides Coresight API for operations on dummy
+ source devices, such as enabling and disabling them. It also provides the
+ Coresight dummy source paths for debugging.
+
+ The primary use case of the coresight dummy source is to build path in kernel
+ side for dummy source component.
+
+maintainers:
+ - Mike Leach <mike.leach@linaro.org>
+ - Suzuki K Poulose <suzuki.poulose@arm.com>
+ - James Clark <james.clark@arm.com>
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Hao Zhang <quic_hazha@quicinc.com>
+
+properties:
+ compatible:
+ enum:
+ - arm,coresight-dummy-source
+
+ out-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: Output connection from the source to Coresight
+ Trace bus.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - out-ports
+
+additionalProperties: false
+
+examples:
+ # Minimum dummy source definition. Dummy source connect to coresight funnel.
+ - |
+ source {
+ compatible = "arm,coresight-dummy-source";
+
+ out-ports {
+ port {
+ dummy_riscv_out_funnel_swao: endpoint {
+ remote-endpoint = <&funnel_swao_in_dummy_riscv>;
+ };
+ };
+ };
+ };
+
+...
--
2.17.1
On Fri, 02 Jun 2023 16:41:48 +0800, Hao Zhang wrote: > This patch add support for Coresight dummy source and dummy sink trace. > > Signed-off-by: Hao Zhang <quic_hazha@quicinc.com> > --- > .../arm/arm,coresight-dummy-sink.yaml | 73 +++++++++++++++++++ > .../arm/arm,coresight-dummy-source.yaml | 71 ++++++++++++++++++ > 2 files changed, 144 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml > create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
Hi Reviewers, Could you please help to review this patch? Thanks Hao On 6/2/2023 4:41 PM, Hao Zhang wrote: > This patch add support for Coresight dummy source and dummy sink trace. > > Signed-off-by: Hao Zhang <quic_hazha@quicinc.com> > --- > .../arm/arm,coresight-dummy-sink.yaml | 73 +++++++++++++++++++ > .../arm/arm,coresight-dummy-source.yaml | 71 ++++++++++++++++++ > 2 files changed, 144 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml > create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml > > diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml > new file mode 100644 > index 000000000000..cb78cfa56702 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml > @@ -0,0 +1,73 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ARM Coresight Dummy sink component > + > +description: | > + CoreSight components are compliant with the ARM CoreSight architecture > + specification and can be connected in various topologies to suit a particular > + SoCs tracing needs. These trace components can generally be classified as > + sinks, links and sources. Trace data produced by one or more sources flows > + through the intermediate links connecting the source to the currently selected > + sink. > + > + The Coresight dummy sink component is for the specific coresight sink devices > + kernel don't have permission to access or configure, e.g., CoreSight EUD on > + Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based > + debug and trace capabilities. For this device, a dummy driver is needed to > + register it as Coresight sink device in kernel side, so that path can be > + created in the driver. Then the trace flow would be transferred to EUD via > + coresight link of AP processor. It provides Coresight API for operations on > + dummy source devices, such as enabling and disabling them. It also provides > + the Coresight dummy source paths for debugging. > + > + The primary use case of the coresight dummy sink is to build path in kernel > + side for dummy sink component. > + > +maintainers: > + - Mike Leach <mike.leach@linaro.org> > + - Suzuki K Poulose <suzuki.poulose@arm.com> > + - James Clark <james.clark@arm.com> > + - Mao Jinlong <quic_jinlmao@quicinc.com> > + - Hao Zhang <quic_hazha@quicinc.com> > + > +properties: > + compatible: > + enum: > + - arm,coresight-dummy-sink > + > + in-ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port: > + description: Input connection from the Coresight Trace bus to > + dummy sink, such as Embedded USB debugger(EUD). > + > + $ref: /schemas/graph.yaml#/properties/port > + > +required: > + - compatible > + - in-ports > + > +additionalProperties: false > + > +examples: > + # Minimum dummy sink definition. Dummy sink connect to coresight replicator. > + - | > + sink { > + compatible = "arm,coresight-dummy-sink"; > + > + in-ports { > + port { > + eud_in_replicator_swao: endpoint { > + remote-endpoint = <&replicator_swao_out_eud>; > + }; > + }; > + }; > + }; > + > +... > diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml > new file mode 100644 > index 000000000000..5fedaed49a1f > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml > @@ -0,0 +1,71 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ARM Coresight Dummy source component > + > +description: | > + CoreSight components are compliant with the ARM CoreSight architecture > + specification and can be connected in various topologies to suit a particular > + SoCs tracing needs. These trace components can generally be classified as > + sinks, links and sources. Trace data produced by one or more sources flows > + through the intermediate links connecting the source to the currently selected > + sink. > + > + The Coresight dummy source component is for the specific coresight source > + devices kernel don't have permission to access or configure. For some SOCs, > + there would be Coresight source trace components on sub-processor which > + are conneted to AP processor via debug bus. For these devices, a dummy driver > + is needed to register them as Coresight source devices, so that paths can be > + created in the driver. It provides Coresight API for operations on dummy > + source devices, such as enabling and disabling them. It also provides the > + Coresight dummy source paths for debugging. > + > + The primary use case of the coresight dummy source is to build path in kernel > + side for dummy source component. > + > +maintainers: > + - Mike Leach <mike.leach@linaro.org> > + - Suzuki K Poulose <suzuki.poulose@arm.com> > + - James Clark <james.clark@arm.com> > + - Mao Jinlong <quic_jinlmao@quicinc.com> > + - Hao Zhang <quic_hazha@quicinc.com> > + > +properties: > + compatible: > + enum: > + - arm,coresight-dummy-source > + > + out-ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port: > + description: Output connection from the source to Coresight > + Trace bus. > + $ref: /schemas/graph.yaml#/properties/port > + > +required: > + - compatible > + - out-ports > + > +additionalProperties: false > + > +examples: > + # Minimum dummy source definition. Dummy source connect to coresight funnel. > + - | > + source { > + compatible = "arm,coresight-dummy-source"; > + > + out-ports { > + port { > + dummy_riscv_out_funnel_swao: endpoint { > + remote-endpoint = <&funnel_swao_in_dummy_riscv>; > + }; > + }; > + }; > + }; > + > +...
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