[PATCH 10/12] arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array

Nishanth Menon posted 12 patches 2 years, 8 months ago
There is a newer version of this series
[PATCH 10/12] arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array
Posted by Nishanth Menon 2 years, 8 months ago
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Cc: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
 .../boot/dts/ti/k3-am65-iot2050-common.dtsi    | 17 ++++++++---------
 .../dts/ti/k3-am6548-iot2050-advanced-m2.dts   | 18 ++++++++----------
 2 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index 6b052a0ecfa1..bbbb5c169ccc 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -384,13 +384,12 @@ &main_gpio0 {
 
 &wkup_gpio0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <
-		&arduino_io_d2_to_d3_pins_default
-		&arduino_i2c_aio_switch_pins_default
-		&arduino_io_oe_pins_default
-		&push_button_pins_default
-		&db9_com_mode_pins_default
-	>;
+	pinctrl-0 =
+		<&arduino_io_d2_to_d3_pins_default>,
+		<&arduino_i2c_aio_switch_pins_default>,
+		<&arduino_io_oe_pins_default>,
+		<&push_button_pins_default>,
+		<&db9_com_mode_pins_default>;
 	gpio-line-names =
 		/* 0..9 */
 		"wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
@@ -711,11 +710,11 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
 &mcu_r5fss0_core0 {
 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 			<&mcu_r5fss0_core0_memory_region>;
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
 };
 
 &mcu_r5fss0_core1 {
 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 			<&mcu_r5fss0_core1_memory_region>;
-	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>;
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
index d5e41bdc89c3..1fc93e0b3c9b 100644
--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
+++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
@@ -66,20 +66,18 @@ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7)  /* (C23) GPIO1_89 */
 
 &main_gpio0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <
-		&main_m2_pcie_mux_control
-		&arduino_io_d4_to_d9_pins_default
-	>;
+	pinctrl-0 =
+		<&main_m2_pcie_mux_control>,
+		<&arduino_io_d4_to_d9_pins_default>;
 };
 
 &main_gpio1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <
-		&main_m2_enable_pins_default
-		&main_pmx0_m2_config_pins_default
-		&main_pmx1_m2_config_pins_default
-		&cp2102n_reset_pin_default
-	>;
+	pinctrl-0 =
+		<&main_m2_enable_pins_default>,
+		<&main_pmx0_m2_config_pins_default>,
+		<&main_pmx1_m2_config_pins_default>,
+		<&cp2102n_reset_pin_default>;
 };
 
 /*
-- 
2.40.0
Re: [PATCH 10/12] arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array
Posted by Jan Kiszka 2 years, 8 months ago
On 01.06.23 17:26, Nishanth Menon wrote:
> When referring to array of phandles, using <> to separate the array
> entries is better notation as it makes potential errors with phandle and
> cell arguments easier to catch. Fix the outliers to be consistent with
> the rest of the usage.
> 
> Cc: Jan Kiszka <jan.kiszka@siemens.com>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
>  .../boot/dts/ti/k3-am65-iot2050-common.dtsi    | 17 ++++++++---------
>  .../dts/ti/k3-am6548-iot2050-advanced-m2.dts   | 18 ++++++++----------
>  2 files changed, 16 insertions(+), 19 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> index 6b052a0ecfa1..bbbb5c169ccc 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> @@ -384,13 +384,12 @@ &main_gpio0 {
>  
>  &wkup_gpio0 {
>  	pinctrl-names = "default";
> -	pinctrl-0 = <
> -		&arduino_io_d2_to_d3_pins_default
> -		&arduino_i2c_aio_switch_pins_default
> -		&arduino_io_oe_pins_default
> -		&push_button_pins_default
> -		&db9_com_mode_pins_default
> -	>;
> +	pinctrl-0 =
> +		<&arduino_io_d2_to_d3_pins_default>,
> +		<&arduino_i2c_aio_switch_pins_default>,
> +		<&arduino_io_oe_pins_default>,
> +		<&push_button_pins_default>,
> +		<&db9_com_mode_pins_default>;
>  	gpio-line-names =
>  		/* 0..9 */
>  		"wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
> @@ -711,11 +710,11 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
>  &mcu_r5fss0_core0 {
>  	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
>  			<&mcu_r5fss0_core0_memory_region>;
> -	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
> +	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
>  };
>  
>  &mcu_r5fss0_core1 {
>  	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
>  			<&mcu_r5fss0_core1_memory_region>;
> -	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
> +	mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>;
>  };
> diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
> index d5e41bdc89c3..1fc93e0b3c9b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
> @@ -66,20 +66,18 @@ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7)  /* (C23) GPIO1_89 */
>  
>  &main_gpio0 {
>  	pinctrl-names = "default";
> -	pinctrl-0 = <
> -		&main_m2_pcie_mux_control
> -		&arduino_io_d4_to_d9_pins_default
> -	>;
> +	pinctrl-0 =
> +		<&main_m2_pcie_mux_control>,
> +		<&arduino_io_d4_to_d9_pins_default>;
>  };
>  
>  &main_gpio1 {
>  	pinctrl-names = "default";
> -	pinctrl-0 = <
> -		&main_m2_enable_pins_default
> -		&main_pmx0_m2_config_pins_default
> -		&main_pmx1_m2_config_pins_default
> -		&cp2102n_reset_pin_default
> -	>;
> +	pinctrl-0 =
> +		<&main_m2_enable_pins_default>,
> +		<&main_pmx0_m2_config_pins_default>,
> +		<&main_pmx1_m2_config_pins_default>,
> +		<&cp2102n_reset_pin_default>;
>  };
>  
>  /*

Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>

Jan

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