From: zhanghui <zhanghui31@xiaomi.com>

When qdepth is not power of 2, not every bit of the mask is 1, so
sq_tail_slot some bits will be cleared unexpected.

Signed-off-by: zhanghui <zhanghui31@xiaomi.com>
---
 drivers/ufs/core/ufshcd-priv.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index d53b93c21a0c..319fba31c1f5 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -366,10 +366,11 @@ static inline bool ufs_is_valid_unit_desc_lun(struct ufs_dev_info *dev_info, u8
 static inline void ufshcd_inc_sq_tail(struct ufs_hw_queue *q)
 	__must_hold(&q->sq_lock)
 {
-	u32 mask = q->max_entries - 1;
 	u32 val;
 
-	q->sq_tail_slot = (q->sq_tail_slot + 1) & mask;
+	q->sq_tail_slot++;
+	if (q->sq_tail_slot == q->max_entries)
+		q->sq_tail_slot = 0;
 	val = q->sq_tail_slot * sizeof(struct utp_transfer_req_desc);
 	writel(val, q->mcq_sq_tail);
 }
-- 
2.39.0

On Thu, 01 Jun 2023 20:46:14 +0800, Zhang Hui wrote:

> When qdepth is not power of 2, not every bit of the mask is 1, so
> sq_tail_slot some bits will be cleared unexpected.
> 
> 

Applied to 6.5/scsi-queue, thanks!

[1/1] scsi: ufs: core: Fix ufshcd_inc_sq_tail function bug
      https://git.kernel.org/mkp/scsi/c/e01d05bbf634

-- 
Martin K. Petersen	Oracle Linux Engineering

Zhang,

> When qdepth is not power of 2, not every bit of the mask is 1, so
> sq_tail_slot some bits will be cleared unexpected.

Applied to 6.5/scsi-staging, thanks!

-- 
Martin K. Petersen	Oracle Linux Engineering

On Thu, Jun 1, 2023 at 8:57 PM Zhang Hui <masonzhang.xiaomi@gmail.com> wrote:
>
> From: zhanghui <zhanghui31@xiaomi.com>
>
> When qdepth is not power of 2, not every bit of the mask is 1, so
> sq_tail_slot some bits will be cleared unexpected.
>
> Signed-off-by: zhanghui <zhanghui31@xiaomi.com>

Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>

On 6/1/23 05:46, Zhang Hui wrote:
> From: zhanghui <zhanghui31@xiaomi.com>
> 
> When qdepth is not power of 2, not every bit of the mask is 1, so
> sq_tail_slot some bits will be cleared unexpected.
> 
> Signed-off-by: zhanghui <zhanghui31@xiaomi.com>
> ---
>   drivers/ufs/core/ufshcd-priv.h | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
> index d53b93c21a0c..319fba31c1f5 100644
> --- a/drivers/ufs/core/ufshcd-priv.h
> +++ b/drivers/ufs/core/ufshcd-priv.h
> @@ -366,10 +366,11 @@ static inline bool ufs_is_valid_unit_desc_lun(struct ufs_dev_info *dev_info, u8
>   static inline void ufshcd_inc_sq_tail(struct ufs_hw_queue *q)
>   	__must_hold(&q->sq_lock)
>   {
> -	u32 mask = q->max_entries - 1;
>   	u32 val;
>   
> -	q->sq_tail_slot = (q->sq_tail_slot + 1) & mask;
> +	q->sq_tail_slot++;
> +	if (q->sq_tail_slot == q->max_entries)
> +		q->sq_tail_slot = 0;
>   	val = q->sq_tail_slot * sizeof(struct utp_transfer_req_desc);
>   	writel(val, q->mcq_sq_tail);
>   }

Reviewed-by: Bart Van Assche <bvanassche@acm.org>