drivers/edac/altera_edac.c | 29 ++++++++++++++++---- include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++ 2 files changed, 44 insertions(+), 5 deletions(-)
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Starting from SoCFPGA Agilex7, new SDM mailbox command is introduced to read Single Event Update Error information, SEU detects both corrected and uncorrected error. If the previous HPS reboot caused by the DDR double bit error, bit-31 is set high of boot scratch register 8. EDAC driver probe will check this bit status and sends the SMC command to Arm Trusted Firmware. Firmware will send mailbox command to SDM to get the SEU error information and pass it to EDAC driver, driver will print error count, sector address and error data for previous DDR DBE. Niravkumar L Rabara (2): firmware: stratix10-svc: Add command to get SEU error info EDAC/altera: Check previous DDR DBE during driver probe drivers/edac/altera_edac.c | 29 ++++++++++++++++---- include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++ 2 files changed, 44 insertions(+), 5 deletions(-) -- 2.25.1
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Starting from SoCFPGA Agilex7, new SDM mailbox command is introduced to read Single Event Upset Error information, SEU can detect both corrected and uncorrected error. If the previous HPS reboot caused by the DDR double bit error, bit-31 is set high of boot scratch register 8. EDAC driver probe will check this bit status and sends the SMC command to Arm Trusted Firmware. Firmware will send mailbox command to SDM to get the SEU error information and pass it to EDAC driver, driver will print error count, sector address and error data for previous DDR DBE. Introduce a new command to get Single Event Upset Error information. changelog v4: * Combined both the patch as per last review comment. changelog v3: * Fixed unnecessary type case, checkpatch warnings and typo changelog v2: * Updated command ID for SEU error Niravkumar L Rabara (1): EDAC/altera: Check previous DDR DBE during driver probe drivers/edac/altera_edac.c | 29 ++++++++++++++++---- include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++ 2 files changed, 44 insertions(+), 5 deletions(-) -- 2.25.1
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Add DDR DBE check during driver probe to notify user if previous
reboot cause by DDR DBE and print DBE error related information.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
drivers/edac/altera_edac.c | 29 ++++++++++++++++----
include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++
2 files changed, 44 insertions(+), 5 deletions(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index 8b31cd54bdb6..04c0675adc8c 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
#ifdef CONFIG_64BIT
{
int dberror, err_addr;
+ struct arm_smccc_res result;
edac->panic_notifier.notifier_call = s10_edac_dberr_handler;
atomic_notifier_chain_register(&panic_notifier_list,
@@ -2168,11 +2169,29 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST,
&dberror);
if (dberror) {
- regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
- &err_addr);
- edac_printk(KERN_ERR, EDAC_DEVICE,
- "Previous Boot UE detected[0x%X] @ 0x%X\n",
- dberror, err_addr);
+ /* Bit-31 is set if previous DDR UE happened */
+ if (dberror & (1 << 31)) {
+ /* Read previous DDR UE info */
+ arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0,
+ 0, 0, 0, 0, 0, 0, &result);
+
+ if (!result.a0) {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n"
+ , (unsigned int)result.a1
+ , (unsigned int)result.a2
+ , (unsigned int)result.a3);
+ } else {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n");
+ }
+ } else {
+ regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
+ &err_addr);
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Previous Boot UE detected[0x%X] @ 0x%X\n",
+ dberror, err_addr);
+ }
/* Reset the sticky registers */
regmap_write(edac->ecc_mgr_map,
S10_SYSMGR_UE_VAL_OFST, 0);
diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h
index a718f853d457..48810c39f612 100644
--- a/include/linux/firmware/intel/stratix10-smc.h
+++ b/include/linux/firmware/intel/stratix10-smc.h
@@ -595,4 +595,24 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)
+/**
+ * Request INTEL_SIP_SMC_READ_SEU_ERR
+ * Sync call to get Single Event Upset Error information
+ * SEU detects both corrected and uncorrected error
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_READ_SEU_ERR
+ * a1-7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_NOT_SUPPORTED or
+ * INTEL_SIP_SMC_STATUS_ERROR
+ * a1 error count of response data
+ * a2 sector address of response data
+ * a3 error data
+ */
+#define INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS 153
+#define INTEL_SIP_SMC_READ_SEU_ERR \
+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS)
+
#endif
--
2.25.1
On 6/14/23 21:25, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Add DDR DBE check during driver probe to notify user if previous
> reboot cause by DDR DBE and print DBE error related information.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> drivers/edac/altera_edac.c | 29 ++++++++++++++++----
> include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++
> 2 files changed, 44 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> index 8b31cd54bdb6..04c0675adc8c 100644
> --- a/drivers/edac/altera_edac.c
> +++ b/drivers/edac/altera_edac.c
> @@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
> #ifdef CONFIG_64BIT
> {
> int dberror, err_addr;
> + struct arm_smccc_res result;
>
> edac->panic_notifier.notifier_call = s10_edac_dberr_handler;
> atomic_notifier_chain_register(&panic_notifier_list,
> @@ -2168,11 +2169,29 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
> regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST,
> &dberror);
> if (dberror) {
> - regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
> - &err_addr);
> - edac_printk(KERN_ERR, EDAC_DEVICE,
> - "Previous Boot UE detected[0x%X] @ 0x%X\n",
> - dberror, err_addr);
> + /* Bit-31 is set if previous DDR UE happened */
> + if (dberror & (1 << 31)) {
> + /* Read previous DDR UE info */
> + arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0,
> + 0, 0, 0, 0, 0, 0, &result);
> +
> + if (!result.a0) {
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n"
> + , (unsigned int)result.a1
> + , (unsigned int)result.a2
> + , (unsigned int)result.a3);
> + } else {
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n");
> + }
> + } else {
> + regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
> + &err_addr);
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "Previous Boot UE detected[0x%X] @ 0x%X\n",
> + dberror, err_addr);
> + }
> /* Reset the sticky registers */
> regmap_write(edac->ecc_mgr_map,
> S10_SYSMGR_UE_VAL_OFST, 0);
> diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h
> index a718f853d457..48810c39f612 100644
> --- a/include/linux/firmware/intel/stratix10-smc.h
> +++ b/include/linux/firmware/intel/stratix10-smc.h
> @@ -595,4 +595,24 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
> #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
> INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)
>
> +/**
> + * Request INTEL_SIP_SMC_READ_SEU_ERR
> + * Sync call to get Single Event Upset Error information
> + * SEU detects both corrected and uncorrected error
> + *
> + * Call register usage:
> + * a0 INTEL_SIP_SMC_READ_SEU_ERR
> + * a1-7 not used
> + *
> + * Return status:
> + * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_NOT_SUPPORTED or
> + * INTEL_SIP_SMC_STATUS_ERROR
> + * a1 error count of response data
> + * a2 sector address of response data
> + * a3 error data
> + */
> +#define INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS 153
> +#define INTEL_SIP_SMC_READ_SEU_ERR \
> + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS)
> +
> #endif
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Starting from SoCFPGA Agilex7, new SDM mailbox command is introduced to read Single Event Upset Error information, SEU can detect both corrected and uncorrected error. If the previous HPS reboot caused by the DDR double bit error, bit-31 is set high of boot scratch register 8. EDAC driver probe will check this bit status and sends the SMC command to Arm Trusted Firmware. Firmware will send mailbox command to SDM to get the SEU error information and pass it to EDAC driver, driver will print error count, sector address and error data for previous DDR DBE. changelog v3: * Fixed unnecessary type case, checkpatch warnings and typo changelog v2: * Updated command ID for SEU error Niravkumar L Rabara (2): firmware: stratix10-svc: Add command to get SEU error info EDAC/altera: Check previous DDR DBE during driver probe drivers/edac/altera_edac.c | 29 ++++++++++++++++---- include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++ 2 files changed, 44 insertions(+), 5 deletions(-) -- 2.25.1
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Introduce a new command to get Single Event Upset Error information.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h
index a718f853d457..48810c39f612 100644
--- a/include/linux/firmware/intel/stratix10-smc.h
+++ b/include/linux/firmware/intel/stratix10-smc.h
@@ -595,4 +595,24 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)
+/**
+ * Request INTEL_SIP_SMC_READ_SEU_ERR
+ * Sync call to get Single Event Upset Error information
+ * SEU detects both corrected and uncorrected error
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_READ_SEU_ERR
+ * a1-7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_NOT_SUPPORTED or
+ * INTEL_SIP_SMC_STATUS_ERROR
+ * a1 error count of response data
+ * a2 sector address of response data
+ * a3 error data
+ */
+#define INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS 153
+#define INTEL_SIP_SMC_READ_SEU_ERR \
+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS)
+
#endif
--
2.25.1From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Add DDR DBE check during driver probe to notify user if previous
reboot cause by DDR DBE and print DBE error related information.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
drivers/edac/altera_edac.c | 29 ++++++++++++++++++++++++-----
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index 8b31cd54bdb6..04c0675adc8c 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
#ifdef CONFIG_64BIT
{
int dberror, err_addr;
+ struct arm_smccc_res result;
edac->panic_notifier.notifier_call = s10_edac_dberr_handler;
atomic_notifier_chain_register(&panic_notifier_list,
@@ -2168,11 +2169,29 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST,
&dberror);
if (dberror) {
- regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
- &err_addr);
- edac_printk(KERN_ERR, EDAC_DEVICE,
- "Previous Boot UE detected[0x%X] @ 0x%X\n",
- dberror, err_addr);
+ /* Bit-31 is set if previous DDR UE happened */
+ if (dberror & (1 << 31)) {
+ /* Read previous DDR UE info */
+ arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0,
+ 0, 0, 0, 0, 0, 0, &result);
+
+ if (!result.a0) {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n"
+ , (unsigned int)result.a1
+ , (unsigned int)result.a2
+ , (unsigned int)result.a3);
+ } else {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n");
+ }
+ } else {
+ regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
+ &err_addr);
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Previous Boot UE detected[0x%X] @ 0x%X\n",
+ dberror, err_addr);
+ }
/* Reset the sticky registers */
regmap_write(edac->ecc_mgr_map,
S10_SYSMGR_UE_VAL_OFST, 0);
--
2.25.1Hi,
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Add DDR DBE check during driver probe to notify user if previous
> reboot cause by DDR DBE and print DBE error related information.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> drivers/edac/altera_edac.c | 29 ++++++++++++++++++++++++-----
> 1 file changed, 24 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> index 8b31cd54bdb6..04c0675adc8c 100644
> --- a/drivers/edac/altera_edac.c
> +++ b/drivers/edac/altera_edac.c
> @@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct
> platform_device *pdev)
> #ifdef CONFIG_64BIT
> {
> int dberror, err_addr;
> + struct arm_smccc_res result;
>
> edac->panic_notifier.notifier_call = s10_edac_dberr_handler;
> atomic_notifier_chain_register(&panic_notifier_list,
> @@ -2168,11 +2169,29 @@ static int altr_edac_a10_probe(struct
> platform_device *pdev)
> regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST,
> &dberror);
> if (dberror) {
> - regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
> - &err_addr);
> - edac_printk(KERN_ERR, EDAC_DEVICE,
> - "Previous Boot UE detected[0x%X] @ 0x%X\n",
> - dberror, err_addr);
> + /* Bit-31 is set if previous DDR UE happened */
> + if (dberror & (1 << 31)) {
> + /* Read previous DDR UE info */
> + arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0,
> + 0, 0, 0, 0, 0, 0, &result);
> +
> + if (!result.a0) {
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n"
> + , (unsigned int)result.a1
> + , (unsigned int)result.a2
> + , (unsigned int)result.a3);
> + } else {
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n");
> + }
> + } else {
> + regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
> + &err_addr);
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "Previous Boot UE detected[0x%X] @ 0x%X\n",
> + dberror, err_addr);
> + }
> /* Reset the sticky registers */
> regmap_write(edac->ecc_mgr_map,
> S10_SYSMGR_UE_VAL_OFST, 0);
> --
> 2.25.1
>
>
I think it would make sense if you combined the 1st patch. This patch
cannot survive on its own without the defines.
Dinh
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Starting from SoCFPGA Agilex7, new SDM mailbox command is introduced to read Single Event Upset Error information, SEU can detect both corrected and uncorrected error. If the previous HPS reboot caused by the DDR double bit error, bit-31 is set high of boot scratch register 8. EDAC driver probe will check this bit status and sends the SMC command to Arm Trusted Firmware. Firmware will send mailbox command to SDM to get the SEU error information and pass it to EDAC driver, driver will print error count, sector address and error data for previous DDR DBE. changelog v2: * Updated command ID for SEU error Niravkumar L Rabara (2): firmware: stratix10-svc: Add command to get SEU error info EDAC/altera: Check previous DDR DBE during driver probe drivers/edac/altera_edac.c | 29 ++++++++++++++++---- include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++ 2 files changed, 44 insertions(+), 5 deletions(-) -- 2.25.1
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Introduce a new command to get Single Event Upset Error information.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h
index a718f853d457..669e2b12be39 100644
--- a/include/linux/firmware/intel/stratix10-smc.h
+++ b/include/linux/firmware/intel/stratix10-smc.h
@@ -595,4 +595,24 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)
+/**
+ * Request INTEL_SIP_SMC_READ_SEU_ERR
+ * Sync call to get Single Event Upsate Error information
+ * SEU detects both corrected and uncorrected error
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_READ_SEU_ERR
+ * a1-7 not used
+ *
+ * Return status:
+ * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_NOT_SUPPORTED or
+ * INTEL_SIP_SMC_STATUS_ERROR
+ * a1 error count of response data
+ * a2 sector address of response data
+ * a3 error data
+ */
+#define INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS 153
+#define INTEL_SIP_SMC_READ_SEU_ERR \
+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS)
+
#endif
--
2.25.1On 5/3/23 05:18, niravkumar.l.rabara@intel.com wrote: > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> > > Introduce a new command to get Single Event Upset Error information. > > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> > --- > include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h > index a718f853d457..669e2b12be39 100644 > --- a/include/linux/firmware/intel/stratix10-smc.h > +++ b/include/linux/firmware/intel/stratix10-smc.h > @@ -595,4 +595,24 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) > #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \ > INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA) > > +/** > + * Request INTEL_SIP_SMC_READ_SEU_ERR > + * Sync call to get Single Event Upsate Error information s/Upsate/Upset > + * SEU detects both corrected and uncorrected error > + * > + * Call register usage: > + * a0 INTEL_SIP_SMC_READ_SEU_ERR > + * a1-7 not used > + * > + * Return status: > + * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_NOT_SUPPORTED or > + * INTEL_SIP_SMC_STATUS_ERROR > + * a1 error count of response data > + * a2 sector address of response data > + * a3 error data > + */ > +#define INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS 153 > +#define INTEL_SIP_SMC_READ_SEU_ERR \ > + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SEU_ERR_STATUS) > + > #endif
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Add DDR DBE check during driver probe to notify user if previous
reboot cause by DDR DBE and print DBE error related information.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
drivers/edac/altera_edac.c | 29 ++++++++++++++++++++++++-----
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index 8b31cd54bdb6..398a49a3eb89 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
#ifdef CONFIG_64BIT
{
int dberror, err_addr;
+ struct arm_smccc_res result;
edac->panic_notifier.notifier_call = s10_edac_dberr_handler;
atomic_notifier_chain_register(&panic_notifier_list,
@@ -2168,11 +2169,28 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST,
&dberror);
if (dberror) {
- regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
- &err_addr);
- edac_printk(KERN_ERR, EDAC_DEVICE,
- "Previous Boot UE detected[0x%X] @ 0x%X\n",
- dberror, err_addr);
+ /* Bit-31 is set if previous DDR UE happened */
+ if (dberror & (1 << 31)) {
+ /* Read previous DDR UE info */
+ arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0,
+ 0, 0, 0, 0, 0, 0, &result);
+
+ if (!(int)result.a0) {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n"
+ , (unsigned int)result.a1, (unsigned int)result.a2
+ , (unsigned int)result.a3);
+ } else {
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n");
+ }
+ } else {
+ regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
+ &err_addr);
+ edac_printk(KERN_ERR, EDAC_DEVICE,
+ "Previous Boot UE detected[0x%X] @ 0x%X\n",
+ dberror, err_addr);
+ }
/* Reset the sticky registers */
regmap_write(edac->ecc_mgr_map,
S10_SYSMGR_UE_VAL_OFST, 0);
@@ -2180,6 +2198,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
S10_SYSMGR_UE_ADDR_OFST, 0);
}
}
+
#else
edac->db_irq = platform_get_irq(pdev, 1);
if (edac->db_irq < 0)
--
2.25.1
On 5/3/23 05:18, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Add DDR DBE check during driver probe to notify user if previous
> reboot cause by DDR DBE and print DBE error related information.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> drivers/edac/altera_edac.c | 29 ++++++++++++++++++++++++-----
> 1 file changed, 24 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> index 8b31cd54bdb6..398a49a3eb89 100644
> --- a/drivers/edac/altera_edac.c
> +++ b/drivers/edac/altera_edac.c
> @@ -2159,6 +2159,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
> #ifdef CONFIG_64BIT
> {
> int dberror, err_addr;
> + struct arm_smccc_res result;
>
> edac->panic_notifier.notifier_call = s10_edac_dberr_handler;
> atomic_notifier_chain_register(&panic_notifier_list,
> @@ -2168,11 +2169,28 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
> regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST,
> &dberror);
> if (dberror) {
> - regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
> - &err_addr);
> - edac_printk(KERN_ERR, EDAC_DEVICE,
> - "Previous Boot UE detected[0x%X] @ 0x%X\n",
> - dberror, err_addr);
> + /* Bit-31 is set if previous DDR UE happened */
> + if (dberror & (1 << 31)) {
> + /* Read previous DDR UE info */
> + arm_smccc_smc(INTEL_SIP_SMC_READ_SEU_ERR, 0,
> + 0, 0, 0, 0, 0, 0, &result);
Please run checkpatch --strict to align these.
> +
> + if (!(int)result.a0) {
Why the typecast to int?
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "Previous DDR UE:Count=0x%X,Address=0x%X,ErrorData=0x%X\n"
> + , (unsigned int)result.a1, (unsigned int)result.a2
> + , (unsigned int)result.a3);
> + } else {
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "INTEL_SIP_SMC_SEU_ERR_STATUS failed\n");
> + }
> + } else {
> + regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST,
> + &err_addr);
> + edac_printk(KERN_ERR, EDAC_DEVICE,
> + "Previous Boot UE detected[0x%X] @ 0x%X\n",
> + dberror, err_addr);
> + }
> /* Reset the sticky registers */
> regmap_write(edac->ecc_mgr_map,
> S10_SYSMGR_UE_VAL_OFST, 0);
> @@ -2180,6 +2198,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
> S10_SYSMGR_UE_ADDR_OFST, 0);
> }
> }
> +
Stray newline.
> #else
> edac->db_irq = platform_get_irq(pdev, 1);
> if (edac->db_irq < 0)
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