Hi
>
> From: Alexander Bahle <bahle@ibv-augsburg.de>
>
> Add DT bindings for the PCIe PHY latencies. Applies to PCIe in host and
> endpoint mode. Setting these improves the PTM timestamp accuracy.
>
> The values are taken from the Link below.
>
> Signed-off-by: Alexander Bahle <bahle@ibv-augsburg.de>
> Signed-off-by: Dominic Rath <rath@ibv-augsburg.de>
> Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/998749/am6442-details-regarding-ptm-implementation
> ---
Would it not make sense to add these dts properties to
k3-am64-main.dtsi? At least this is what the commit message says.
> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> index 39feea78a084..f448c98f1aa1 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> @@ -552,6 +552,8 @@ serdes0_pcie_link: phy@0 {
> #phy-cells = <0>;
> cdns,phy-type = <PHY_TYPE_PCIE>;
> resets = <&serdes_wiz0 1>;
> + tx-phy-latency-ps = <138800 69400>;
> + rx-phy-latency-ps = <185200 92600>;
> };
> };
>
> --
> 2.36.0
>
--
greets
--
Christian Gmeiner, MSc
https://christian-gmeiner.info/privacypolicy