fss node claims to be entirely a syscon node, but it is really two
parts of it - one a syscon that controls the hbmc mux and a simple bus
where ospi, hbmc peripherals are located. So model it accordingly by
splitting the node up and using ti,j721e-system-controller to describe
the syscon
Signed-off-by: Nishanth Menon <nm@ti.com>
---
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 21 +++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index b58a31371bf3..7653cb191be1 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -338,18 +338,27 @@ mcu_spi2: spi@40320000 {
status = "disabled";
};
- fss: syscon@47000000 {
- compatible = "syscon", "simple-mfd";
+ hbmc_syscon: syscon@47000000 {
+ compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
reg = <0x00 0x47000000 0x00 0x100>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0x47000000 0x100>;
- hbmc_mux: hbmc-mux {
+ hbmc_mux: mux-controller@4 {
compatible = "mmio-mux";
+ reg = <0x4 0x2>;
#mux-control-cells = <1>;
mux-reg-masks = <0x4 0x2>; /* HBMC select */
};
+ };
+
+ fss: bus@47030000 {
+ compatible = "simple-bus";
+ reg = <0x0 0x47030000 0x0 0x100>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
hbmc: hyperbus@47034000 {
compatible = "ti,am654-hbmc";
--
2.40.0On 4/24/23 12:36 PM, Nishanth Menon wrote:
> fss node claims to be entirely a syscon node, but it is really two
> parts of it - one a syscon that controls the hbmc mux and a simple bus
> where ospi, hbmc peripherals are located. So model it accordingly by
> splitting the node up and using ti,j721e-system-controller to describe
> the syscon
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 21 +++++++++++++------
> 1 file changed, 15 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index b58a31371bf3..7653cb191be1 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -338,18 +338,27 @@ mcu_spi2: spi@40320000 {
> status = "disabled";
> };
>
> - fss: syscon@47000000 {
> - compatible = "syscon", "simple-mfd";
> + hbmc_syscon: syscon@47000000 {
> + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
> reg = <0x00 0x47000000 0x00 0x100>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x00 0x00 0x47000000 0x100>;
>
> - hbmc_mux: hbmc-mux {
> + hbmc_mux: mux-controller@4 {
> compatible = "mmio-mux";
> + reg = <0x4 0x2>;
> #mux-control-cells = <1>;
> mux-reg-masks = <0x4 0x2>; /* HBMC select */
> };
> + };
> +
> + fss: bus@47030000 {
> + compatible = "simple-bus";
> + reg = <0x0 0x47030000 0x0 0x100>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> hbmc: hyperbus@47034000 {
> compatible = "ti,am654-hbmc";
I hope all the things you had to do here show you what I mean in my
comments on [0] :)
I've posted a first step patch that allows "reg-mux" node to work with
regular reg properties[1]. Which means this patch could have been just this:
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -305,15 +305,16 @@ wkup_i2c0: i2c@42120000 {
status = "disabled";
};
- fss: syscon@47000000 {
- compatible = "syscon", "simple-mfd";
+ fss: bus@47000000 {
+ compatible = "simple-bus";
reg = <0x00 0x47000000 0x00 0x100>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
hbmc_mux: hbmc-mux {
- compatible = "mmio-mux";
+ compatible = "reg-mux";
+ reg = <0x00 0x47000004 0x00 0x2>;
#mux-control-cells = <1>;
mux-reg-masks = <0x4 0x2>; /* HBMC select */
};
Andrew
[0] https://lore.kernel.org/all/76da0b98-3274-b047-db11-ecabc117ae11@ti.com/
[1] https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/
On 13:55-20230424, Andrew Davis wrote:
> On 4/24/23 12:36 PM, Nishanth Menon wrote:
> > fss node claims to be entirely a syscon node, but it is really two
> > parts of it - one a syscon that controls the hbmc mux and a simple bus
> > where ospi, hbmc peripherals are located. So model it accordingly by
> > splitting the node up and using ti,j721e-system-controller to describe
> > the syscon
> >
> > Signed-off-by: Nishanth Menon <nm@ti.com>
> > ---
> > .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 21 +++++++++++++------
> > 1 file changed, 15 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> > index b58a31371bf3..7653cb191be1 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> > @@ -338,18 +338,27 @@ mcu_spi2: spi@40320000 {
> > status = "disabled";
> > };
> > - fss: syscon@47000000 {
> > - compatible = "syscon", "simple-mfd";
> > + hbmc_syscon: syscon@47000000 {
> > + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
> > reg = <0x00 0x47000000 0x00 0x100>;
> > - #address-cells = <2>;
> > - #size-cells = <2>;
> > - ranges;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0x00 0x00 0x47000000 0x100>;
> > - hbmc_mux: hbmc-mux {
> > + hbmc_mux: mux-controller@4 {
> > compatible = "mmio-mux";
> > + reg = <0x4 0x2>;
> > #mux-control-cells = <1>;
> > mux-reg-masks = <0x4 0x2>; /* HBMC select */
> > };
> > + };
> > +
> > + fss: bus@47030000 {
> > + compatible = "simple-bus";
> > + reg = <0x0 0x47030000 0x0 0x100>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > hbmc: hyperbus@47034000 {
> > compatible = "ti,am654-hbmc";
>
>
> I hope all the things you had to do here show you what I mean in my
> comments on [0] :)
yup.
>
> I've posted a first step patch that allows "reg-mux" node to work with
> regular reg properties[1]. Which means this patch could have been just this:
>
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -305,15 +305,16 @@ wkup_i2c0: i2c@42120000 {
> status = "disabled";
> };
> - fss: syscon@47000000 {
> - compatible = "syscon", "simple-mfd";
> + fss: bus@47000000 {
> + compatible = "simple-bus";
> reg = <0x00 0x47000000 0x00 0x100>;
> #address-cells = <2>;
> #size-cells = <2>;
> ranges;
> hbmc_mux: hbmc-mux {
> - compatible = "mmio-mux";
> + compatible = "reg-mux";
> + reg = <0x00 0x47000004 0x00 0x2>;
> #mux-control-cells = <1>;
> mux-reg-masks = <0x4 0x2>; /* HBMC select */
> };
>
> Andrew
>
> [0] https://lore.kernel.org/all/76da0b98-3274-b047-db11-ecabc117ae11@ti.com/
> [1] https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/
yes, this is a better approach. Lets see the conclusion of the
discussion.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hi Nishanth,
On 4/24/2023 11:06 PM, Nishanth Menon wrote:
> fss node claims to be entirely a syscon node, but it is really two
> parts of it - one a syscon that controls the hbmc mux and a simple bus
> where ospi, hbmc peripherals are located. So model it accordingly by
> splitting the node up and using ti,j721e-system-controller to describe
> the syscon
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 21 +++++++++++++------
> 1 file changed, 15 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index b58a31371bf3..7653cb191be1 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -338,18 +338,27 @@ mcu_spi2: spi@40320000 {
> status = "disabled";
> };
>
> - fss: syscon@47000000 {
> - compatible = "syscon", "simple-mfd";
> + hbmc_syscon: syscon@47000000 {
> + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
> reg = <0x00 0x47000000 0x00 0x100>;
Description is given upto 0x78 register in TRM (Section 12.3.1.6 FSS
Registers)
Should we limit length to 0x78 ?
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x00 0x00 0x47000000 0x100>;
>
> - hbmc_mux: hbmc-mux {
> + hbmc_mux: mux-controller@4 {
> compatible = "mmio-mux";
> + reg = <0x4 0x2>;
> #mux-control-cells = <1>;
> mux-reg-masks = <0x4 0x2>; /* HBMC select */
> };
> + };
> +
> + fss: bus@47030000 {
> + compatible = "simple-bus";
> + reg = <0x0 0x47030000 0x0 0x100>;
Only registers upto address 0x47030008 has valid description in TRM
Section, 13.3.3.6.3 HyperBus Subsystem Registers
Please see, if we need to limit length to 8 instead of 256
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
>
> hbmc: hyperbus@47034000 {
> compatible = "ti,am654-hbmc";
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