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[PATCH 1/6] KVM: x86: Virtualize CR4.LASS

Zeng Guang posted 6 patches 2 years, 8 months ago
There is a newer version of this series
[PATCH 1/6] KVM: x86: Virtualize CR4.LASS
Posted by Zeng Guang 2 years, 8 months ago 
Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned
as CR4.LASS generally set once for each vCPU at boot time and won't be
toggled at runtime. Besides, only if VM has LASS capability enumerated with
CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able
to set CR4.LASS. By design CR4.LASS can be manipulated by nested guest as
well.

Notes: Setting CR4.LASS to 1 enable LASS in IA-32e mode. It doesn't take
effect in legacy mode even if CR4.LASS is set.

Signed-off-by: Zeng Guang <guang.zeng@intel.com>
---
 arch/x86/include/asm/kvm_host.h | 2 +-
 arch/x86/kvm/vmx/vmx.c          | 3 +++
 arch/x86/kvm/x86.h              | 2 ++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 6aaae18f1854..8ff89a52ef66 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -125,7 +125,7 @@
 			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
 			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
 			  | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
-			  | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
+			  | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP | X86_CR4_LASS))
 
 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
 
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 43ff3276918b..c923d7599d71 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7569,6 +7569,9 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu)
 	cr4_fixed1_update(X86_CR4_UMIP,       ecx, feature_bit(UMIP));
 	cr4_fixed1_update(X86_CR4_LA57,       ecx, feature_bit(LA57));
 
+	entry = kvm_find_cpuid_entry_index(vcpu, 0x7, 1);
+	cr4_fixed1_update(X86_CR4_LASS,       eax, feature_bit(LASS));
+
 #undef cr4_fixed1_update
 }
 
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 7c8a30d44c29..218f4c73789a 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -475,6 +475,8 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
 		__reserved_bits |= X86_CR4_VMXE;        \
 	if (!__cpu_has(__c, X86_FEATURE_PCID))          \
 		__reserved_bits |= X86_CR4_PCIDE;       \
+	if (!__cpu_has(__c, X86_FEATURE_LASS))          \
+		__reserved_bits |= X86_CR4_LASS;        \
 	__reserved_bits;                                \
 })
 
-- 
2.27.0
Re: [PATCH 1/6] KVM: x86: Virtualize CR4.LASS
Posted by Chao Gao 2 years, 7 months ago 
On Thu, Apr 20, 2023 at 09:37:19PM +0800, Zeng Guang wrote:
>Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned
>as CR4.LASS generally set once for each vCPU at boot time and won't be
>toggled at runtime. Besides, only if VM has LASS capability enumerated with
>CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able
>to set CR4.LASS.

>By design CR4.LASS can be manipulated by nested guest as
>well.

This is inaccurate. The change in nested_vmx_cr_fixed1_bits_update() is
to allow L1 guests to set CR4.LASS in VMX operation. I would say:

Set the CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 MSR for guests
to allow guests to enable LASS in nested VMX operation.
Re: [PATCH 1/6] KVM: x86: Virtualize CR4.LASS
Posted by Zeng Guang 2 years, 7 months ago 
On 4/24/2023 3:32 PM, Gao, Chao wrote:
> On Thu, Apr 20, 2023 at 09:37:19PM +0800, Zeng Guang wrote:
>> Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned
>> as CR4.LASS generally set once for each vCPU at boot time and won't be
>> toggled at runtime. Besides, only if VM has LASS capability enumerated with
>> CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able
>> to set CR4.LASS.
>> By design CR4.LASS can be manipulated by nested guest as
>> well.
> This is inaccurate. The change in nested_vmx_cr_fixed1_bits_update() is
> to allow L1 guests to set CR4.LASS in VMX operation.

Essentially it allows nested guest to set CR4.LASS. L1 guest uses 
cr4_fixed1 to check
cr4 value requested to set by nested guest valid or not. Nested guest 
will get #GP
fault if it's not allowed.

> I would say:
>
> Set the CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 MSR for guests
> to allow guests to enable LASS in nested VMX operation.
Re: [PATCH 1/6] KVM: x86: Virtualize CR4.LASS
Posted by Chao Gao 2 years, 7 months ago 
On Tue, Apr 25, 2023 at 10:35:25AM +0800, Zeng Guang wrote:
>
>On 4/24/2023 3:32 PM, Gao, Chao wrote:
>> On Thu, Apr 20, 2023 at 09:37:19PM +0800, Zeng Guang wrote:
>> > Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned
>> > as CR4.LASS generally set once for each vCPU at boot time and won't be
>> > toggled at runtime. Besides, only if VM has LASS capability enumerated with
>> > CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able
>> > to set CR4.LASS.
>> > By design CR4.LASS can be manipulated by nested guest as
>> > well.
>> This is inaccurate. The change in nested_vmx_cr_fixed1_bits_update() is
>> to allow L1 guests to set CR4.LASS in VMX operation.
>
>Essentially it allows nested guest to set CR4.LASS. L1 guest uses cr4_fixed1
>to check
>cr4 value requested to set by nested guest valid or not. Nested guest will
>get #GP
>fault if it's not allowed.

The change to CR4_FIXED1 has more impacts. Without CR4_FIXED1 change,
guest shouldn't enable LASS in VMX operation; it means:

1. before VMXON, LASS should be disabled
2. in VMX operation, LASS cannot be enabled

What you said (i.e., L1 guest allows L2 to enable LASS) belongs in #2.
But #1 isn't covered. That's why I said "inaccurate".

>
>> I would say:
>> 
>> Set the CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 MSR for guests
>> to allow guests to enable LASS in nested VMX operation.
>
Re: [PATCH 1/6] KVM: x86: Virtualize CR4.LASS
Posted by Binbin Wu 2 years, 7 months ago 
Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com>

one nit below

On 4/20/2023 9:37 PM, Zeng Guang wrote:
> Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned
under control of KVM or under KVM's control

Or just simply use "intercept"?

> as CR4.LASS generally set once for each vCPU at boot time and won't be
> toggled at runtime. Besides, only if VM has LASS capability enumerated with
> CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able
> to set CR4.LASS. By design CR4.LASS can be manipulated by nested guest as
> well.
>
> Notes: Setting CR4.LASS to 1 enable LASS in IA-32e mode. It doesn't take
> effect in legacy mode even if CR4.LASS is set.
>
> Signed-off-by: Zeng Guang <guang.zeng@intel.com>
> ---
>   arch/x86/include/asm/kvm_host.h | 2 +-
>   arch/x86/kvm/vmx/vmx.c          | 3 +++
>   arch/x86/kvm/x86.h              | 2 ++
>   3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 6aaae18f1854..8ff89a52ef66 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -125,7 +125,7 @@
>   			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
>   			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
>   			  | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
> -			  | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
> +			  | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP | X86_CR4_LASS))
>   
>   #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
>   
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 43ff3276918b..c923d7599d71 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -7569,6 +7569,9 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu)
>   	cr4_fixed1_update(X86_CR4_UMIP,       ecx, feature_bit(UMIP));
>   	cr4_fixed1_update(X86_CR4_LA57,       ecx, feature_bit(LA57));
>   
> +	entry = kvm_find_cpuid_entry_index(vcpu, 0x7, 1);
> +	cr4_fixed1_update(X86_CR4_LASS,       eax, feature_bit(LASS));
> +
>   #undef cr4_fixed1_update
>   }
>   
> diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
> index 7c8a30d44c29..218f4c73789a 100644
> --- a/arch/x86/kvm/x86.h
> +++ b/arch/x86/kvm/x86.h
> @@ -475,6 +475,8 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
>   		__reserved_bits |= X86_CR4_VMXE;        \
>   	if (!__cpu_has(__c, X86_FEATURE_PCID))          \
>   		__reserved_bits |= X86_CR4_PCIDE;       \
> +	if (!__cpu_has(__c, X86_FEATURE_LASS))          \
> +		__reserved_bits |= X86_CR4_LASS;        \
>   	__reserved_bits;                                \
>   })
>
Re: [PATCH 1/6] KVM: x86: Virtualize CR4.LASS
Posted by Zeng Guang 2 years, 7 months ago 
On 4/24/2023 2:45 PM, Binbin Wu wrote:
> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com>
>
> one nit below
>
> On 4/20/2023 9:37 PM, Zeng Guang wrote:
>> Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned
> under control of KVM or under KVM's control
>
> Or just simply use "intercept"?

OK. Will change it.

>> as CR4.LASS generally set once for each vCPU at boot time and won't be
>> toggled at runtime. Besides, only if VM has LASS capability enumerated with
>> CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able
>> to set CR4.LASS. By design CR4.LASS can be manipulated by nested guest as
>> well.
>>
>> Notes: Setting CR4.LASS to 1 enable LASS in IA-32e mode. It doesn't take
>> effect in legacy mode even if CR4.LASS is set.
>>
>> Signed-off-by: Zeng Guang <guang.zeng@intel.com>
>> ---
>>    arch/x86/include/asm/kvm_host.h | 2 +-
>>    arch/x86/kvm/vmx/vmx.c          | 3 +++
>>    arch/x86/kvm/x86.h              | 2 ++
>>    3 files changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
>> index 6aaae18f1854..8ff89a52ef66 100644
>> --- a/arch/x86/include/asm/kvm_host.h
>> +++ b/arch/x86/include/asm/kvm_host.h
>> @@ -125,7 +125,7 @@
>>    			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
>>    			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
>>    			  | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
>> -			  | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
>> +			  | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP | X86_CR4_LASS))
>>    
>>    #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
>>    
>> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
>> index 43ff3276918b..c923d7599d71 100644
>> --- a/arch/x86/kvm/vmx/vmx.c
>> +++ b/arch/x86/kvm/vmx/vmx.c
>> @@ -7569,6 +7569,9 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu)
>>    	cr4_fixed1_update(X86_CR4_UMIP,       ecx, feature_bit(UMIP));
>>    	cr4_fixed1_update(X86_CR4_LA57,       ecx, feature_bit(LA57));
>>    
>> +	entry = kvm_find_cpuid_entry_index(vcpu, 0x7, 1);
>> +	cr4_fixed1_update(X86_CR4_LASS,       eax, feature_bit(LASS));
>> +
>>    #undef cr4_fixed1_update
>>    }
>>    
>> diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
>> index 7c8a30d44c29..218f4c73789a 100644
>> --- a/arch/x86/kvm/x86.h
>> +++ b/arch/x86/kvm/x86.h
>> @@ -475,6 +475,8 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
>>    		__reserved_bits |= X86_CR4_VMXE;        \
>>    	if (!__cpu_has(__c, X86_FEATURE_PCID))          \
>>    		__reserved_bits |= X86_CR4_PCIDE;       \
>> +	if (!__cpu_has(__c, X86_FEATURE_LASS))          \
>> +		__reserved_bits |= X86_CR4_LASS;        \
>>    	__reserved_bits;                                \
>>    })
>>

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