[v2] clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock

[PATCH V2] clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock

Posted by Kathiravan T 2 years, 8 months ago

The order of DT_SLEEP_CLK and DT_XO are swapped and it is incorrect.
Due to which the clocks for which the parent should be XO is having parent
as SLEEP_CLK and vice versa. So fix the same by re-ordering the entries.

Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Reported-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
---
Changes in V2:
	- Added the Reported-by and Fixes tag

 drivers/clk/qcom/gcc-ipq5332.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
index 8cacbfb10c72..14096887d436 100644
--- a/drivers/clk/qcom/gcc-ipq5332.c
+++ b/drivers/clk/qcom/gcc-ipq5332.c
@@ -20,8 +20,8 @@
 #include "reset.h"
 
 enum {
-	DT_SLEEP_CLK,
 	DT_XO,
+	DT_SLEEP_CLK,
 	DT_PCIE_2LANE_PHY_PIPE_CLK,
 	DT_PCIE_2LANE_PHY_PIPE_CLK_X1,
 	DT_USB_PCIE_WRAPPER_PIPE_CLK,
-- 
2.17.1

Re: [PATCH V2] clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock

Posted by Bjorn Andersson 2 years, 6 months ago

On Mon, 17 Apr 2023 16:26:07 +0530, Kathiravan T wrote:
> The order of DT_SLEEP_CLK and DT_XO are swapped and it is incorrect.
> Due to which the clocks for which the parent should be XO is having parent
> as SLEEP_CLK and vice versa. So fix the same by re-ordering the entries.
> 
> 

Applied, thanks!

[1/1] clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock
      commit: 7510e80f4ac707efc7e964120525ef759a02f171

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: [PATCH V2] clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock

Posted by Kathiravan T 2 years, 7 months ago

On 4/17/2023 4:26 PM, Kathiravan T wrote:
> The order of DT_SLEEP_CLK and DT_XO are swapped and it is incorrect.
> Due to which the clocks for which the parent should be XO is having parent
> as SLEEP_CLK and vice versa. So fix the same by re-ordering the entries.


Gentle Reminder...


>
> Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
> Reported-by: Devi Priya <quic_devipriy@quicinc.com>
> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> ---
> Changes in V2:
> 	- Added the Reported-by and Fixes tag
>
>   drivers/clk/qcom/gcc-ipq5332.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
> index 8cacbfb10c72..14096887d436 100644
> --- a/drivers/clk/qcom/gcc-ipq5332.c
> +++ b/drivers/clk/qcom/gcc-ipq5332.c
> @@ -20,8 +20,8 @@
>   #include "reset.h"
>   
>   enum {
> -	DT_SLEEP_CLK,
>   	DT_XO,
> +	DT_SLEEP_CLK,
>   	DT_PCIE_2LANE_PHY_PIPE_CLK,
>   	DT_PCIE_2LANE_PHY_PIPE_CLK_X1,
>   	DT_USB_PCIE_WRAPPER_PIPE_CLK,

Re: [PATCH V2] clk: qcom: ipq5332: fix the order of SLEEP_CLK and XO clock

Posted by Konrad Dybcio 2 years, 8 months ago


On 17.04.2023 12:56, Kathiravan T wrote:
> The order of DT_SLEEP_CLK and DT_XO are swapped and it is incorrect.
> Due to which the clocks for which the parent should be XO is having parent
> as SLEEP_CLK and vice versa. So fix the same by re-ordering the entries.
> 
> Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
> Reported-by: Devi Priya <quic_devipriy@quicinc.com>
> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> ---
This matches what I can see in the bindings.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
> Changes in V2:
> 	- Added the Reported-by and Fixes tag
> 
>  drivers/clk/qcom/gcc-ipq5332.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
> index 8cacbfb10c72..14096887d436 100644
> --- a/drivers/clk/qcom/gcc-ipq5332.c
> +++ b/drivers/clk/qcom/gcc-ipq5332.c
> @@ -20,8 +20,8 @@
>  #include "reset.h"
>  
>  enum {
> -	DT_SLEEP_CLK,
>  	DT_XO,
> +	DT_SLEEP_CLK,
>  	DT_PCIE_2LANE_PHY_PIPE_CLK,
>  	DT_PCIE_2LANE_PHY_PIPE_CLK_X1,
>  	DT_USB_PCIE_WRAPPER_PIPE_CLK,