480MHz is derived from P_GPLL4_OUT_AUX not from P_GPLL4_OUT_MAIN. Update
the freq_tbl with the correct src.

Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Reported-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
---
 drivers/clk/qcom/gcc-ipq5332.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
index bdb4a0a11d07..8cacbfb10c72 100644
--- a/drivers/clk/qcom/gcc-ipq5332.c
+++ b/drivers/clk/qcom/gcc-ipq5332.c
@@ -366,7 +366,7 @@ static struct clk_rcg2 gcc_adss_pwm_clk_src = {
 };
 
 static const struct freq_tbl ftbl_gcc_apss_axi_clk_src[] = {
-	F(480000000, P_GPLL4_OUT_MAIN, 2.5, 0, 0),
+	F(480000000, P_GPLL4_OUT_AUX, 2.5, 0, 0),
 	F(533333333, P_GPLL0_OUT_MAIN, 1.5, 0, 0),
 	{ }
 };
-- 
2.17.1

On Mon, 17 Apr 2023 10:13:42 +0530, Kathiravan T wrote:
> 480MHz is derived from P_GPLL4_OUT_AUX not from P_GPLL4_OUT_MAIN. Update
> the freq_tbl with the correct src.
> 
> 

Applied, thanks!

[1/1] clk: qcom: ipq5332: fix the src parameter in ftbl_gcc_apss_axi_clk_src
      commit: 81c1ef89a45eccd5603f1e27e281d14fefcb81f9

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

On 4/17/2023 10:13 AM, Kathiravan T wrote:
> 480MHz is derived from P_GPLL4_OUT_AUX not from P_GPLL4_OUT_MAIN. Update
> the freq_tbl with the correct src.


Gentle Reminder...


>
> Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
> Reported-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> ---
>   drivers/clk/qcom/gcc-ipq5332.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
> index bdb4a0a11d07..8cacbfb10c72 100644
> --- a/drivers/clk/qcom/gcc-ipq5332.c
> +++ b/drivers/clk/qcom/gcc-ipq5332.c
> @@ -366,7 +366,7 @@ static struct clk_rcg2 gcc_adss_pwm_clk_src = {
>   };
>   
>   static const struct freq_tbl ftbl_gcc_apss_axi_clk_src[] = {
> -	F(480000000, P_GPLL4_OUT_MAIN, 2.5, 0, 0),
> +	F(480000000, P_GPLL4_OUT_AUX, 2.5, 0, 0),
>   	F(533333333, P_GPLL0_OUT_MAIN, 1.5, 0, 0),
>   	{ }
>   };