[PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu: Add MCU domain R5F cluster node

Hari Nagalla posted 3 patches 2 years, 10 months ago
There is a newer version of this series
[PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu: Add MCU domain R5F cluster node
Posted by Hari Nagalla 2 years, 10 months ago
The J784S4 SoCs have 4 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
the MCU domain (MCU_R5FSS0), and the remaining three clusters are
present in the MAIN domain (MAIN_R5FSS0, MAIN_R5FSS1 & MAIN_R5FSS2).
The functionality of the R5FSS is same as the R5FSS functionality on
earlier K3 platform devices J721S2. Each of the R5FSS can be configured
at boot time to be either run in a LockStep mode or in an Asymmetric
Multi Processing (AMP) fashion in Split-mode.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
---
 .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     | 42 +++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 64bd3dee14aa..e290e0925bc9 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -309,4 +309,46 @@
 			ti,cpts-periodic-outputs = <2>;
 		};
 	};
+
+	mcu_r5fss0: r5fss@41000000 {
+		compatible = "ti,j721s2-r5fss";
+		ti,cluster-mode = <1>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x41000000 0x00 0x41000000 0x20000>,
+			 <0x41400000 0x00 0x41400000 0x20000>;
+		power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
+
+		mcu_r5fss0_core0: r5f@41000000 {
+			compatible = "ti,j721s2-r5f";
+			reg = <0x41000000 0x00010000>,
+			      <0x41010000 0x00010000>;
+			reg-names = "atcm", "btcm";
+			ti,sci = <&sms>;
+			ti,sci-dev-id = <346>;
+			ti,sci-proc-ids = <0x01 0xff>;
+			resets = <&k3_reset 346 1>;
+			firmware-name = "j784s4-mcu-r5f0_0-fw";
+			ti,atcm-enable = <1>;
+			ti,btcm-enable = <1>;
+			ti,loczrama = <1>;
+			status = "disabled";
+		};
+
+		mcu_r5fss0_core1: r5f@41400000 {
+			compatible = "ti,j721s2-r5f";
+			reg = <0x41400000 0x00010000>,
+			      <0x41410000 0x00010000>;
+			reg-names = "atcm", "btcm";
+			ti,sci = <&sms>;
+			ti,sci-dev-id = <347>;
+			ti,sci-proc-ids = <0x02 0xff>;
+			resets = <&k3_reset 347 1>;
+			firmware-name = "j784s4-mcu-r5f0_1-fw";
+			ti,atcm-enable = <1>;
+			ti,btcm-enable = <1>;
+			ti,loczrama = <1>;
+			status = "disabled";
+		};
+	};
 };
-- 
2.17.1
Re: [PATCH 2/3] arm64: dts: ti: k3-j784s4-mcu: Add MCU domain R5F cluster node
Posted by Nishanth Menon 2 years, 10 months ago
On 04:36-20230329, Hari Nagalla wrote:
> The J784S4 SoCs have 4 dual-core Arm Cortex-R5F processor (R5FSS)
> subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
> the MCU domain (MCU_R5FSS0), and the remaining three clusters are
> present in the MAIN domain (MAIN_R5FSS0, MAIN_R5FSS1 & MAIN_R5FSS2).
> The functionality of the R5FSS is same as the R5FSS functionality on
> earlier K3 platform devices J721S2. Each of the R5FSS can be configured
> at boot time to be either run in a LockStep mode or in an Asymmetric
> Multi Processing (AMP) fashion in Split-mode.
> 
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> ---
>  .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     | 42 +++++++++++++++++++
>  1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> index 64bd3dee14aa..e290e0925bc9 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> @@ -309,4 +309,46 @@
>  			ti,cpts-periodic-outputs = <2>;
>  		};
>  	};
> +
> +	mcu_r5fss0: r5fss@41000000 {
> +		compatible = "ti,j721s2-r5fss";
> +		ti,cluster-mode = <1>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x41000000 0x00 0x41000000 0x20000>,
> +			 <0x41400000 0x00 0x41400000 0x20000>;
> +		power-domains = <&k3_pds 345 TI_SCI_PD_EXCLUSIVE>;
> +
> +		mcu_r5fss0_core0: r5f@41000000 {
> +			compatible = "ti,j721s2-r5f";
> +			reg = <0x41000000 0x00010000>,
> +			      <0x41010000 0x00010000>;
> +			reg-names = "atcm", "btcm";
> +			ti,sci = <&sms>;
> +			ti,sci-dev-id = <346>;
> +			ti,sci-proc-ids = <0x01 0xff>;
> +			resets = <&k3_reset 346 1>;
> +			firmware-name = "j784s4-mcu-r5f0_0-fw";
> +			ti,atcm-enable = <1>;
> +			ti,btcm-enable = <1>;
> +			ti,loczrama = <1>;
> +			status = "disabled";

Why are these disabled by default?

> +		};
> +
> +		mcu_r5fss0_core1: r5f@41400000 {
> +			compatible = "ti,j721s2-r5f";
> +			reg = <0x41400000 0x00010000>,
> +			      <0x41410000 0x00010000>;
> +			reg-names = "atcm", "btcm";
> +			ti,sci = <&sms>;
> +			ti,sci-dev-id = <347>;
> +			ti,sci-proc-ids = <0x02 0xff>;
> +			resets = <&k3_reset 347 1>;
> +			firmware-name = "j784s4-mcu-r5f0_1-fw";
> +			ti,atcm-enable = <1>;
> +			ti,btcm-enable = <1>;
> +			ti,loczrama = <1>;
> +			status = "disabled";
> +		};
> +	};
>  };
> -- 
> 2.17.1
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D