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[PATCH] arm64: dts: qcom: sm8450: add crypto nodes

Neil Armstrong posted 1 patch 2 years, 10 months ago 
arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
[PATCH] arm64: dts: qcom: sm8450: add crypto nodes
Posted by Neil Armstrong 2 years, 10 months ago 
Add crypto engine (CE) and CE BAM related nodes and definitions
for the SM8450 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 7c1d1464a1f8..d7e0a1993558 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4084,6 +4084,34 @@ ufs_mem_phy_lanes: phy@1d87400 {
 			};
 		};
 
+		cryptobam: dma-controller@1dc4000 {
+			compatible = "qcom,bam-v1.7.0";
+			reg = <0 0x01dc4000 0 0x28000>;
+			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			qcom,ee = <0>;
+			qcom,controlled-remotely;
+			iommus = <&apps_smmu 0x584 0x11>,
+				 <&apps_smmu 0x588 0x0>,
+				 <&apps_smmu 0x598 0x5>,
+				 <&apps_smmu 0x59a 0x0>,
+				 <&apps_smmu 0x59f 0x0>;
+		};
+
+		crypto: crypto@1de0000 {
+			compatible = "qcom,sm8450-qce", "qcom,sm8150-qce", "qcom,qce";
+			reg = <0 0x01dfa000 0 0x6000>;
+			dmas = <&cryptobam 4>, <&cryptobam 5>;
+			dma-names = "rx", "tx";
+			iommus = <&apps_smmu 0x584 0x11>,
+				 <&apps_smmu 0x588 0x0>,
+				 <&apps_smmu 0x598 0x5>,
+				 <&apps_smmu 0x59a 0x0>,
+				 <&apps_smmu 0x59f 0x0>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+			interconnect-names = "memory";
+		};
+
 		sdhc_2: mmc@8804000 {
 			compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
 			reg = <0 0x08804000 0 0x1000>;

---
base-commit: b12b871ec9079b0baefa69f8a869712682d16020
change-id: 20230322-topic-sm8450-upstream-qce-04daf8d81bb1

Best regards,
-- 
Neil Armstrong <neil.armstrong@linaro.org>
Re: [PATCH] arm64: dts: qcom: sm8450: add crypto nodes
Posted by Bhupesh Sharma 2 years, 10 months ago 
On Wed, 22 Mar 2023 at 15:34, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> Add crypto engine (CE) and CE BAM related nodes and definitions
> for the SM8450 SoC.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 7c1d1464a1f8..d7e0a1993558 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -4084,6 +4084,34 @@ ufs_mem_phy_lanes: phy@1d87400 {
>                         };
>                 };
>
> +               cryptobam: dma-controller@1dc4000 {
> +                       compatible = "qcom,bam-v1.7.0";

This should be "qcom,bam-v1.7.4" instead, as per the HW documentation.
Please refer to my patch here:
https://lore.kernel.org/linux-arm-msm/20230321184811.3325725-1-bhupesh.sharma@linaro.org/

So, if you want I can modify this and fold it in my overall dts
patchset, for which I am about to send a v2:
https://lore.kernel.org/linux-arm-msm/20230321190118.3327360-1-bhupesh.sharma@linaro.org/

Thanks,
Bhupesh

> +                       reg = <0 0x01dc4000 0 0x28000>;
> +                       interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> +                       #dma-cells = <1>;
> +                       qcom,ee = <0>;
> +                       qcom,controlled-remotely;
> +                       iommus = <&apps_smmu 0x584 0x11>,
> +                                <&apps_smmu 0x588 0x0>,
> +                                <&apps_smmu 0x598 0x5>,
> +                                <&apps_smmu 0x59a 0x0>,
> +                                <&apps_smmu 0x59f 0x0>;
> +               };
> +
> +               crypto: crypto@1de0000 {
> +                       compatible = "qcom,sm8450-qce", "qcom,sm8150-qce", "qcom,qce";
> +                       reg = <0 0x01dfa000 0 0x6000>;
> +                       dmas = <&cryptobam 4>, <&cryptobam 5>;
> +                       dma-names = "rx", "tx";
> +                       iommus = <&apps_smmu 0x584 0x11>,
> +                                <&apps_smmu 0x588 0x0>,
> +                                <&apps_smmu 0x598 0x5>,
> +                                <&apps_smmu 0x59a 0x0>,
> +                                <&apps_smmu 0x59f 0x0>;
> +                       interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
> +                       interconnect-names = "memory";
> +               };
> +
>                 sdhc_2: mmc@8804000 {
>                         compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
>                         reg = <0 0x08804000 0 0x1000>;
>
> ---
> base-commit: b12b871ec9079b0baefa69f8a869712682d16020
> change-id: 20230322-topic-sm8450-upstream-qce-04daf8d81bb1
>
> Best regards,
> --
> Neil Armstrong <neil.armstrong@linaro.org>
>
Re: [PATCH] arm64: dts: qcom: sm8450: add crypto nodes
Posted by Neil Armstrong 2 years, 10 months ago 
On 22/03/2023 11:15, Bhupesh Sharma wrote:
> On Wed, 22 Mar 2023 at 15:34, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>>
>> Add crypto engine (CE) and CE BAM related nodes and definitions
>> for the SM8450 SoC.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++++++++++++++++
>>   1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> index 7c1d1464a1f8..d7e0a1993558 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> @@ -4084,6 +4084,34 @@ ufs_mem_phy_lanes: phy@1d87400 {
>>                          };
>>                  };
>>
>> +               cryptobam: dma-controller@1dc4000 {
>> +                       compatible = "qcom,bam-v1.7.0";
> 
> This should be "qcom,bam-v1.7.4" instead, as per the HW documentation.
> Please refer to my patch here:
> https://lore.kernel.org/linux-arm-msm/20230321184811.3325725-1-bhupesh.sharma@linaro.org/
> 
> So, if you want I can modify this and fold it in my overall dts
> patchset, for which I am about to send a v2:
> https://lore.kernel.org/linux-arm-msm/20230321190118.3327360-1-bhupesh.sharma@linaro.org/

Sure take it in your v2 !

Neil

> 
> Thanks,
> Bhupesh
> 
>> +                       reg = <0 0x01dc4000 0 0x28000>;
>> +                       interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
>> +                       #dma-cells = <1>;
>> +                       qcom,ee = <0>;
>> +                       qcom,controlled-remotely;
>> +                       iommus = <&apps_smmu 0x584 0x11>,
>> +                                <&apps_smmu 0x588 0x0>,
>> +                                <&apps_smmu 0x598 0x5>,
>> +                                <&apps_smmu 0x59a 0x0>,
>> +                                <&apps_smmu 0x59f 0x0>;
>> +               };
>> +
>> +               crypto: crypto@1de0000 {
>> +                       compatible = "qcom,sm8450-qce", "qcom,sm8150-qce", "qcom,qce";
>> +                       reg = <0 0x01dfa000 0 0x6000>;
>> +                       dmas = <&cryptobam 4>, <&cryptobam 5>;
>> +                       dma-names = "rx", "tx";
>> +                       iommus = <&apps_smmu 0x584 0x11>,
>> +                                <&apps_smmu 0x588 0x0>,
>> +                                <&apps_smmu 0x598 0x5>,
>> +                                <&apps_smmu 0x59a 0x0>,
>> +                                <&apps_smmu 0x59f 0x0>;
>> +                       interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
>> +                       interconnect-names = "memory";
>> +               };
>> +
>>                  sdhc_2: mmc@8804000 {
>>                          compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
>>                          reg = <0 0x08804000 0 0x1000>;
>>
>> ---
>> base-commit: b12b871ec9079b0baefa69f8a869712682d16020
>> change-id: 20230322-topic-sm8450-upstream-qce-04daf8d81bb1
>>
>> Best regards,
>> --
>> Neil Armstrong <neil.armstrong@linaro.org>
>>

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