Hi Sabiya,
On 16/03/23 16:17, sabiya.d@mistralsolutions.com wrote:
> From: Dasnavis Sabiya <sabiya.d@ti.com>
>
> The size of IO PADCONFIG register set of the wakeup domain is incorrect for
> J784S4. Update the PADCONFIG offset size to the correct value for
> J784S4 SoC.
>
> Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> index 64bd3dee14aa..c0103513c64c 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> @@ -50,7 +50,7 @@ mcu_ram: sram@41c00000 {
> wkup_pmx0: pinctrl@4301c000 {
> compatible = "pinctrl-single";
> /* Proxy 0 addressing */
> - reg = <0x00 0x4301c000 0x00 0x178>;
> + reg = <0x00 0x4301c000 0x00 0x194>;
> #pinctrl-cells = <1>;
> pinctrl-single,register-width = <32>;
> pinctrl-single,function-mask = <0xffffffff>;
Similar feedback as for the J721S2 PADCONFIG patch, see the discussion below,
https://lore.kernel.org/all/20230328114742.tnaa5hi3qm3rsgld@ecology/
As suggested by Nishanth, let us do a single fixup to avoid non-addressable
regions and fix the padconfig region size.
From datasheet I can see that the addresses corresponding to WKUP_PADCONFIG13,
WKUP_PADCONFIG25 are missing for J784S4.
--
Regards,
Vaishnav