ARM architecture only has 'memory', so all devices are accessed by MMIO.

Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>
---
 drivers/gpu/drm/ast/ast_main.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index 794ffd4a29c5..f86d01e9f024 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -424,22 +424,7 @@ struct ast_device *ast_device_create(const struct drm_driver *drv,
 	if (!ast->regs)
 		return ERR_PTR(-EIO);
 
-	/*
-	 * If we don't have IO space at all, use MMIO now and
-	 * assume the chip has MMIO enabled by default (rev 0x20
-	 * and higher).
-	 */
-	if (!(pci_resource_flags(pdev, 2) & IORESOURCE_IO)) {
-		drm_info(dev, "platform has no IO space, trying MMIO\n");
-		ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
-	}
-
-	/* "map" IO regs if the above hasn't done so already */
-	if (!ast->ioregs) {
-		ast->ioregs = pcim_iomap(pdev, 2, 0);
-		if (!ast->ioregs)
-			return ERR_PTR(-EIO);
-	}
+	ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
 
 	ast_detect_chip(dev, &need_post);
 

base-commit: 254986e324add8a30d0019c6da59f81adc8b565f
-- 
2.25.1

Hi Thomas,

Could you help review this patch??

We met some problem on nvidia's ARM platfrom and need this patch to fix it.

On 2023/3/2 上午 10:19, Jammy Huang wrote:
> ARM architecture only has 'memory', so all devices are accessed by MMIO.
>
> Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>
> ---
>   drivers/gpu/drm/ast/ast_main.c | 17 +----------------
>   1 file changed, 1 insertion(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
> index 794ffd4a29c5..f86d01e9f024 100644
> --- a/drivers/gpu/drm/ast/ast_main.c
> +++ b/drivers/gpu/drm/ast/ast_main.c
> @@ -424,22 +424,7 @@ struct ast_device *ast_device_create(const struct drm_driver *drv,
>   	if (!ast->regs)
>   		return ERR_PTR(-EIO);
>   
> -	/*
> -	 * If we don't have IO space at all, use MMIO now and
> -	 * assume the chip has MMIO enabled by default (rev 0x20
> -	 * and higher).
> -	 */
> -	if (!(pci_resource_flags(pdev, 2) & IORESOURCE_IO)) {
> -		drm_info(dev, "platform has no IO space, trying MMIO\n");
> -		ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
> -	}
> -
> -	/* "map" IO regs if the above hasn't done so already */
> -	if (!ast->ioregs) {
> -		ast->ioregs = pcim_iomap(pdev, 2, 0);
> -		if (!ast->ioregs)
> -			return ERR_PTR(-EIO);
> -	}
> +	ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
>   
>   	ast_detect_chip(dev, &need_post);
>   
>
> base-commit: 254986e324add8a30d0019c6da59f81adc8b565f

-- 
Best Regards
Jammy

Hi

Am 07.04.23 um 04:09 schrieb Jammy Huang:
> Hi Thomas,
> 
> Could you help review this patch??
> 
> We met some problem on nvidia's ARM platfrom and need this patch to fix it.
> 
> On 2023/3/2 上午 10:19, Jammy Huang wrote:
>> ARM architecture only has 'memory', so all devices are accessed by MMIO.
>>
>> Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>
>> ---
>>   drivers/gpu/drm/ast/ast_main.c | 17 +----------------
>>   1 file changed, 1 insertion(+), 16 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/ast/ast_main.c 
>> b/drivers/gpu/drm/ast/ast_main.c
>> index 794ffd4a29c5..f86d01e9f024 100644
>> --- a/drivers/gpu/drm/ast/ast_main.c
>> +++ b/drivers/gpu/drm/ast/ast_main.c
>> @@ -424,22 +424,7 @@ struct ast_device *ast_device_create(const struct 
>> drm_driver *drv,
>>       if (!ast->regs)
>>           return ERR_PTR(-EIO);
>> -    /*
>> -     * If we don't have IO space at all, use MMIO now and
>> -     * assume the chip has MMIO enabled by default (rev 0x20
>> -     * and higher).
>> -     */
>> -    if (!(pci_resource_flags(pdev, 2) & IORESOURCE_IO)) {
>> -        drm_info(dev, "platform has no IO space, trying MMIO\n");
>> -        ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
>> -    }
>> -
>> -    /* "map" IO regs if the above hasn't done so already */
>> -    if (!ast->ioregs) {
>> -        ast->ioregs = pcim_iomap(pdev, 2, 0);

What happens on systems that use this branch?

Best regards
Thomas

>> -        if (!ast->ioregs)
>> -            return ERR_PTR(-EIO);
>> -    }
>> +    ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
>>       ast_detect_chip(dev, &need_post);
>>
>> base-commit: 254986e324add8a30d0019c6da59f81adc8b565f
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Ivo Totev