On 2/28/2023 9:29 PM, Konrad Dybcio wrote:
>
> On 28.02.2023 16:33, Bryan O'Donoghue wrote:
>> On 28/02/2023 15:24, Konrad Dybcio wrote:
>>> The downstream driver signals the hardware to be enabled only after the
>>> interrupts are unmasked, which... makes sense. Follow suit.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>>> ---
>>> drivers/media/platform/qcom/venus/hfi_venus.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c
>>> index 772e5e9cf127..4d785e53aa0b 100644
>>> --- a/drivers/media/platform/qcom/venus/hfi_venus.c
>>> +++ b/drivers/media/platform/qcom/venus/hfi_venus.c
>>> @@ -454,7 +454,6 @@ static int venus_boot_core(struct venus_hfi_device *hdev)
>>> void __iomem *wrapper_base = hdev->core->wrapper_base;
>>> int ret = 0;
>>> - writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT);
>>> if (IS_IRIS1(hdev->core) || IS_IRIS2(hdev->core) || IS_IRIS2_1(hdev->core)) {
>>> mask_val = readl(wrapper_base + WRAPPER_INTR_MASK);
>>> mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BASK_V6 |
>>> @@ -466,6 +465,7 @@ static int venus_boot_core(struct venus_hfi_device *hdev)
>>> writel(mask_val, wrapper_base + WRAPPER_INTR_MASK);
>>> writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3);
>>> + writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT);
>>> while (!ctrl_status && count < max_tries) {
>>> ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
>>> if ((ctrl_status & CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK) == 4) {
>>>
>> This should go before you add your new macros in-place of IS_V6() and it should have a fixes.
> Ack
>
> Konrad
Agree with Bryan and this change looks fine to me.
>> ---
>> bod