For RISCV we always assume devices are DMA coherent.
Select ARCH_DMA_DEFAULT_COHERENT to ensure dev->dma_conherent
is always initialized to true.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8b1dbd23dbd6..c1327309e0f6 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -13,6 +13,7 @@ config 32BIT
 config RISCV
 	def_bool y
 	select ARCH_CLOCKSOURCE_INIT
+	select ARCH_DMA_DEFAULT_COHERENT
 	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
 	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
 	select ARCH_HAS_BINFMT_FLAT
-- 
2.37.1 (Apple Git-137.1)

On Tue, Feb 21, 2023 at 12:46:12PM +0000, Jiaxun Yang wrote:
> For RISCV we always assume devices are DMA coherent.

"Always assume", I'm not keen on that wording as it is unclear as to
whether you are suggesting that a) we always take devices to be DMA
coherent, or b) unless a device states it is non-coherent, we take it to
be DMA coherent.
I think you mean b, but being exact would be appreciated, thanks.

> Select ARCH_DMA_DEFAULT_COHERENT to ensure dev->dma_conherent
> is always initialized to true.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

Why was this not sent to the riscv list?
When (or if) you send v2, can you please make sure that you do cc it?

Thanks,
Conor.

> 2023年2月21日 18:14，Conor Dooley <conor@kernel.org> 写道：
> 
> On Tue, Feb 21, 2023 at 12:46:12PM +0000, Jiaxun Yang wrote:
>> For RISCV we always assume devices are DMA coherent.
> 
> "Always assume", I'm not keen on that wording as it is unclear as to
> whether you are suggesting that a) we always take devices to be DMA
> coherent, or b) unless a device states it is non-coherent, we take it to
> be DMA coherent.
> I think you mean b, but being exact would be appreciated, thanks.

Yep I meant option b, thanks for the point.

> 
>> Select ARCH_DMA_DEFAULT_COHERENT to ensure dev->dma_conherent
>> is always initialized to true.
>> 
>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> 
> Why was this not sent to the riscv list?
> When (or if) you send v2, can you please make sure that you do cc it?
Will do.

Thanks
- Jiaxun

> 
> Thanks,
> Conor.