Add the Display Port controller subnode to the MDSS node.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 79 ++++++++++++++++++++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 6caa2c8efb46..72d54beb7d7c 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint {
};
};
+ port@2 {
+ reg = <2>;
+ dpu_intf0_out: endpoint {
+ remote-endpoint = <&mdss_dp0_in>;
+ };
+ };
+
};
mdp_opp_table: opp-table {
@@ -2783,6 +2790,78 @@ opp-500000000 {
};
};
+ mdss_dp0: displayport-controller@ae90000 {
+ compatible = "qcom,sm8350-dp";
+ reg = <0 0xae90000 0 0xfc>,
+ <0 0xae90200 0 0xc0>,
+ <0 0xae90400 0 0x770>,
+ <0 0xae91000 0 0x98>,
+ <0 0xae91400 0 0x98>;
+ interrupt-parent = <&mdss>;
+ interrupts = <12>;
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ clock-names = "core_iface",
+ "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface",
+ "stream_pixel";
+
+ assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
+ <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+
+ phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
+ phy-names = "dp";
+
+ #sound-dai-cells = <0>;
+
+ operating-points-v2 = <&dp_opp_table>;
+ power-domains = <&rpmhpd SM8450_MMCX>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ mdss_dp0_in: endpoint {
+ remote-endpoint = <&dpu_intf0_out>;
+ };
+ };
+ };
+
+ dp_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-540000000 {
+ opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
--
2.34.1On 10/02/2023 16:44, Neil Armstrong wrote:
> Add the Display Port controller subnode to the MDSS node.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 79 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 79 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 6caa2c8efb46..72d54beb7d7c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint {
> };
> };
>
> + port@2 {
> + reg = <2>;
> + dpu_intf0_out: endpoint {
> + remote-endpoint = <&mdss_dp0_in>;
> + };
> + };
> +
> };
>
> mdp_opp_table: opp-table {
> @@ -2783,6 +2790,78 @@ opp-500000000 {
> };
> };
>
> + mdss_dp0: displayport-controller@ae90000 {
> + compatible = "qcom,sm8350-dp";
Missing "qcom,sm8450-dp". As I wrote in the comment to patch 1, I'd
suggest having just a single entry here rather than keeping both 8350
and 8450 entries.
> + reg = <0 0xae90000 0 0xfc>,
> + <0 0xae90200 0 0xc0>,
> + <0 0xae90400 0 0x770>,
> + <0 0xae91000 0 0x98>,
> + <0 0xae91400 0 0x98>;
While this sounds correct, usually we used the even size here (0x200,
0x400, etc.). Can we please switch to it (especially since sm8350-dp
uses even sizes).
> + interrupt-parent = <&mdss>;
> + interrupts = <12>;
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
> + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
> + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
> + clock-names = "core_iface",
> + "core_aux",
> + "ctrl_link",
> + "ctrl_link_iface",
> + "stream_pixel";
> +
> + assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
> + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
> + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
> +
> + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
> + phy-names = "dp";
> +
> + #sound-dai-cells = <0>;
> +
> + operating-points-v2 = <&dp_opp_table>;
> + power-domains = <&rpmhpd SM8450_MMCX>;
> +
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + mdss_dp0_in: endpoint {
> + remote-endpoint = <&dpu_intf0_out>;
> + };
> + };
> + };
> +
> + dp_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-160000000 {
> + opp-hz = /bits/ 64 <160000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-270000000 {
> + opp-hz = /bits/ 64 <270000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> +
> + opp-540000000 {
> + opp-hz = /bits/ 64 <540000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-810000000 {
> + opp-hz = /bits/ 64 <810000000>;
> + required-opps = <&rpmhpd_opp_nom>;
> + };
> + };
> + };
> +
> mdss_dsi0: dsi@ae94000 {
> compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl";
> reg = <0 0x0ae94000 0 0x400>;
>
--
With best wishes
Dmitry
On 10/02/2023 16:24, Dmitry Baryshkov wrote:
> On 10/02/2023 16:44, Neil Armstrong wrote:
>> Add the Display Port controller subnode to the MDSS node.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 79 ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 79 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> index 6caa2c8efb46..72d54beb7d7c 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> @@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint {
>> };
>> };
>> + port@2 {
>> + reg = <2>;
>> + dpu_intf0_out: endpoint {
>> + remote-endpoint = <&mdss_dp0_in>;
>> + };
>> + };
>> +
>> };
>> mdp_opp_table: opp-table {
>> @@ -2783,6 +2790,78 @@ opp-500000000 {
>> };
>> };
>> + mdss_dp0: displayport-controller@ae90000 {
>> + compatible = "qcom,sm8350-dp";
Exact, must fix.
>
> Missing "qcom,sm8450-dp". As I wrote in the comment to patch 1, I'd suggest having just a single entry here rather than keeping both 8350 and 8450 entries.
>
>> + reg = <0 0xae90000 0 0xfc>,
>> + <0 0xae90200 0 0xc0>,
>> + <0 0xae90400 0 0x770>,
>> + <0 0xae91000 0 0x98>,
>> + <0 0xae91400 0 0x98>;
>
>
> While this sounds correct, usually we used the even size here (0x200, 0x400, etc.). Can we please switch to it (especially since sm8350-dp uses even sizes).
I don't have access to registers layout for HDK8450 but the system freezes when using even sizes, using
the exact register size works fine.
Neil
>
>> + interrupt-parent = <&mdss>;
>> + interrupts = <12>;
>> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
>> + <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
>> + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
>> + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
>> + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
>> + clock-names = "core_iface",
>> + "core_aux",
>> + "ctrl_link",
>> + "ctrl_link_iface",
>> + "stream_pixel";
>> +
>> + assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
>> + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
>> + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
>> + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
>> +
>> + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
>> + phy-names = "dp";
>> +
>> + #sound-dai-cells = <0>;
>> +
>> + operating-points-v2 = <&dp_opp_table>;
>> + power-domains = <&rpmhpd SM8450_MMCX>;
>> +
>> + status = "disabled";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + mdss_dp0_in: endpoint {
>> + remote-endpoint = <&dpu_intf0_out>;
>> + };
>> + };
>> + };
>> +
>> + dp_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-160000000 {
>> + opp-hz = /bits/ 64 <160000000>;
>> + required-opps = <&rpmhpd_opp_low_svs>;
>> + };
>> +
>> + opp-270000000 {
>> + opp-hz = /bits/ 64 <270000000>;
>> + required-opps = <&rpmhpd_opp_svs>;
>> + };
>> +
>> + opp-540000000 {
>> + opp-hz = /bits/ 64 <540000000>;
>> + required-opps = <&rpmhpd_opp_svs_l1>;
>> + };
>> +
>> + opp-810000000 {
>> + opp-hz = /bits/ 64 <810000000>;
>> + required-opps = <&rpmhpd_opp_nom>;
>> + };
>> + };
>> + };
>> +
>> mdss_dsi0: dsi@ae94000 {
>> compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl";
>> reg = <0 0x0ae94000 0 0x400>;
>>
>
On 10/02/2023 17:28, Neil Armstrong wrote:
> On 10/02/2023 16:24, Dmitry Baryshkov wrote:
>> On 10/02/2023 16:44, Neil Armstrong wrote:
>>> Add the Display Port controller subnode to the MDSS node.
>>>
>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>> ---
>>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 79
>>> ++++++++++++++++++++++++++++++++++++
>>> 1 file changed, 79 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>> b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>> index 6caa2c8efb46..72d54beb7d7c 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>> @@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint {
>>> };
>>> };
>>> + port@2 {
>>> + reg = <2>;
>>> + dpu_intf0_out: endpoint {
>>> + remote-endpoint = <&mdss_dp0_in>;
>>> + };
>>> + };
>>> +
>>> };
>>> mdp_opp_table: opp-table {
>>> @@ -2783,6 +2790,78 @@ opp-500000000 {
>>> };
>>> };
>>> + mdss_dp0: displayport-controller@ae90000 {
>>> + compatible = "qcom,sm8350-dp";
>
> Exact, must fix.
>
>>
>> Missing "qcom,sm8450-dp". As I wrote in the comment to patch 1, I'd
>> suggest having just a single entry here rather than keeping both 8350
>> and 8450 entries.
>>
>>> + reg = <0 0xae90000 0 0xfc>,
>>> + <0 0xae90200 0 0xc0>,
>>> + <0 0xae90400 0 0x770>,
>>> + <0 0xae91000 0 0x98>,
>>> + <0 0xae91400 0 0x98>;
>>
>>
>> While this sounds correct, usually we used the even size here (0x200,
>> 0x400, etc.). Can we please switch to it (especially since sm8350-dp
>> uses even sizes).
>
> I don't have access to registers layout for HDK8450 but the system
> freezes when using even sizes, using
> the exact register size works fine.
Interesting. Could you please trace, what exactly makes it fail, since
specifying bigger region size should not cause such issues.
--
With best wishes
Dmitry
On 10/02/2023 16:54, Dmitry Baryshkov wrote:
> On 10/02/2023 17:28, Neil Armstrong wrote:
>> On 10/02/2023 16:24, Dmitry Baryshkov wrote:
>>> On 10/02/2023 16:44, Neil Armstrong wrote:
>>>> Add the Display Port controller subnode to the MDSS node.
>>>>
>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 79 ++++++++++++++++++++++++++++++++++++
>>>> 1 file changed, 79 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> index 6caa2c8efb46..72d54beb7d7c 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> @@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint {
>>>> };
>>>> };
>>>> + port@2 {
>>>> + reg = <2>;
>>>> + dpu_intf0_out: endpoint {
>>>> + remote-endpoint = <&mdss_dp0_in>;
>>>> + };
>>>> + };
>>>> +
>>>> };
>>>> mdp_opp_table: opp-table {
>>>> @@ -2783,6 +2790,78 @@ opp-500000000 {
>>>> };
>>>> };
>>>> + mdss_dp0: displayport-controller@ae90000 {
>>>> + compatible = "qcom,sm8350-dp";
>>
>> Exact, must fix.
>>
>>>
>>> Missing "qcom,sm8450-dp". As I wrote in the comment to patch 1, I'd suggest having just a single entry here rather than keeping both 8350 and 8450 entries.
>>>
>>>> + reg = <0 0xae90000 0 0xfc>,
>>>> + <0 0xae90200 0 0xc0>,
>>>> + <0 0xae90400 0 0x770>,
>>>> + <0 0xae91000 0 0x98>,
>>>> + <0 0xae91400 0 0x98>;
>>>
>>>
>>> While this sounds correct, usually we used the even size here (0x200, 0x400, etc.). Can we please switch to it (especially since sm8350-dp uses even sizes).
>>
>> I don't have access to registers layout for HDK8450 but the system freezes when using even sizes, using
>> the exact register size works fine.
>
> Interesting. Could you please trace, what exactly makes it fail, since specifying bigger region size should not cause such issues.
Yep I'll trace what's happening.
Neil
>
On 13/02/2023 13:32, neil.armstrong@linaro.org wrote:
> On 10/02/2023 16:54, Dmitry Baryshkov wrote:
>> On 10/02/2023 17:28, Neil Armstrong wrote:
>>> On 10/02/2023 16:24, Dmitry Baryshkov wrote:
>>>> On 10/02/2023 16:44, Neil Armstrong wrote:
>>>>> Add the Display Port controller subnode to the MDSS node.
>>>>>
>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>>> ---
>>>>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 79 ++++++++++++++++++++++++++++++++++++
>>>>> 1 file changed, 79 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>> index 6caa2c8efb46..72d54beb7d7c 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>> @@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint {
>>>>> };
>>>>> };
>>>>> + port@2 {
>>>>> + reg = <2>;
>>>>> + dpu_intf0_out: endpoint {
>>>>> + remote-endpoint = <&mdss_dp0_in>;
>>>>> + };
>>>>> + };
>>>>> +
>>>>> };
>>>>> mdp_opp_table: opp-table {
>>>>> @@ -2783,6 +2790,78 @@ opp-500000000 {
>>>>> };
>>>>> };
>>>>> + mdss_dp0: displayport-controller@ae90000 {
>>>>> + compatible = "qcom,sm8350-dp";
>>>
>>> Exact, must fix.
>>>
>>>>
>>>> Missing "qcom,sm8450-dp". As I wrote in the comment to patch 1, I'd suggest having just a single entry here rather than keeping both 8350 and 8450 entries.
>>>>
>>>>> + reg = <0 0xae90000 0 0xfc>,
>>>>> + <0 0xae90200 0 0xc0>,
>>>>> + <0 0xae90400 0 0x770>,
>>>>> + <0 0xae91000 0 0x98>,
>>>>> + <0 0xae91400 0 0x98>;
>>>>
>>>>
>>>> While this sounds correct, usually we used the even size here (0x200, 0x400, etc.). Can we please switch to it (especially since sm8350-dp uses even sizes).
>>>
>>> I don't have access to registers layout for HDK8450 but the system freezes when using even sizes, using
>>> the exact register size works fine.
>>
>> Interesting. Could you please trace, what exactly makes it fail, since specifying bigger region size should not cause such issues.
>
> Yep I'll trace what's happening.
OK weird, I tried with the same sizes as sm8350, and it works fine.
Will resend with this fixed.
Neil
>
> Neil
>
>>
>
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