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[PATCH] perf vendor events intel: Add Emerald Rapids

kan.liang@linux.intel.com posted 1 patch 2 years, 7 months ago 
tools/perf/pmu-events/arch/x86/mapfile.csv | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH] perf vendor events intel: Add Emerald Rapids
Posted by kan.liang@linux.intel.com 2 years, 7 months ago 
From: Kan Liang <kan.liang@linux.intel.com>

The event list of the Emerald Rapids is the same as the Sapphire
Rapids. Add the CPU model ID of Emerald Rapids into the mapfile.csv and
point it to the event list of Sapphire Rapids.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
 tools/perf/pmu-events/arch/x86/mapfile.csv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
index 711a4ef05fdf..5facdac6fe8e 100644
--- a/tools/perf/pmu-events/arch/x86/mapfile.csv
+++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
@@ -21,7 +21,7 @@ GenuineIntel-6-A[AC],v1.00,meteorlake,core
 GenuineIntel-6-1[AEF],v3,nehalemep,core
 GenuineIntel-6-2E,v3,nehalemex,core
 GenuineIntel-6-2A,v17,sandybridge,core
-GenuineIntel-6-8F,v1.09,sapphirerapids,core
+GenuineIntel-6-(8F|CF),v1.09,sapphirerapids,core
 GenuineIntel-6-(37|4A|4C|4D|5A),v14,silvermont,core
 GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v53,skylake,core
 GenuineIntel-6-55-[01234],v1.28,skylakex,core
-- 
2.35.1
Re: [PATCH] perf vendor events intel: Add Emerald Rapids
Posted by Ian Rogers 2 years, 7 months ago 
On Wed, Jan 18, 2023 at 9:57 AM <kan.liang@linux.intel.com> wrote:
>
> From: Kan Liang <kan.liang@linux.intel.com>
>
> The event list of the Emerald Rapids is the same as the Sapphire
> Rapids. Add the CPU model ID of Emerald Rapids into the mapfile.csv and
> point it to the event list of Sapphire Rapids.
>
> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>

Acked-by: Ian Rogers <irogers@google.com>

I note it currently isn't on the perfmon github:
https://github.com/intel/perfmon/blob/main/mapfile.csv
This will create a diff from the version of mapfile.csv generated by:
https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py
Presumably there will be an update to solve that.

Thanks,
Ian

> ---
>  tools/perf/pmu-events/arch/x86/mapfile.csv | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
> index 711a4ef05fdf..5facdac6fe8e 100644
> --- a/tools/perf/pmu-events/arch/x86/mapfile.csv
> +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
> @@ -21,7 +21,7 @@ GenuineIntel-6-A[AC],v1.00,meteorlake,core
>  GenuineIntel-6-1[AEF],v3,nehalemep,core
>  GenuineIntel-6-2E,v3,nehalemex,core
>  GenuineIntel-6-2A,v17,sandybridge,core
> -GenuineIntel-6-8F,v1.09,sapphirerapids,core
> +GenuineIntel-6-(8F|CF),v1.09,sapphirerapids,core
>  GenuineIntel-6-(37|4A|4C|4D|5A),v14,silvermont,core
>  GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v53,skylake,core
>  GenuineIntel-6-55-[01234],v1.28,skylakex,core
> --
> 2.35.1
>
Re: [PATCH] perf vendor events intel: Add Emerald Rapids
Posted by Arnaldo Carvalho de Melo 2 years, 7 months ago 
Em Wed, Jan 18, 2023 at 10:02:04AM -0800, Ian Rogers escreveu:
> On Wed, Jan 18, 2023 at 9:57 AM <kan.liang@linux.intel.com> wrote:
> >
> > From: Kan Liang <kan.liang@linux.intel.com>
> >
> > The event list of the Emerald Rapids is the same as the Sapphire
> > Rapids. Add the CPU model ID of Emerald Rapids into the mapfile.csv and
> > point it to the event list of Sapphire Rapids.
> >
> > Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
> 
> Acked-by: Ian Rogers <irogers@google.com>
> 
> I note it currently isn't on the perfmon github:
> https://github.com/intel/perfmon/blob/main/mapfile.csv
> This will create a diff from the version of mapfile.csv generated by:
> https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py
> Presumably there will be an update to solve that.

Thanks, applied.

- Arnaldo
Re: [PATCH] perf vendor events intel: Add Emerald Rapids
Posted by Liang, Kan 2 years, 7 months ago 

On 2023-01-18 1:02 p.m., Ian Rogers wrote:
> On Wed, Jan 18, 2023 at 9:57 AM <kan.liang@linux.intel.com> wrote:
>>
>> From: Kan Liang <kan.liang@linux.intel.com>
>>
>> The event list of the Emerald Rapids is the same as the Sapphire
>> Rapids. Add the CPU model ID of Emerald Rapids into the mapfile.csv and
>> point it to the event list of Sapphire Rapids.
>>
>> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
> 
> Acked-by: Ian Rogers <irogers@google.com>
>> I note it currently isn't on the perfmon github:
> https://github.com/intel/perfmon/blob/main/mapfile.csv

Right, but it will be fixed soon.

Thanks,
Kan
> This will create a diff from the version of mapfile.csv generated by:
> https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py
> Presumably there will be an update to solve that.>
> Thanks,
> Ian
> 
>> ---
>>  tools/perf/pmu-events/arch/x86/mapfile.csv | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
>> index 711a4ef05fdf..5facdac6fe8e 100644
>> --- a/tools/perf/pmu-events/arch/x86/mapfile.csv
>> +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
>> @@ -21,7 +21,7 @@ GenuineIntel-6-A[AC],v1.00,meteorlake,core
>>  GenuineIntel-6-1[AEF],v3,nehalemep,core
>>  GenuineIntel-6-2E,v3,nehalemex,core
>>  GenuineIntel-6-2A,v17,sandybridge,core
>> -GenuineIntel-6-8F,v1.09,sapphirerapids,core
>> +GenuineIntel-6-(8F|CF),v1.09,sapphirerapids,core
>>  GenuineIntel-6-(37|4A|4C|4D|5A),v14,silvermont,core
>>  GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v53,skylake,core
>>  GenuineIntel-6-55-[01234],v1.28,skylakex,core
>> --
>> 2.35.1
>>

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