Since we can't do CALL/RET until GS is restored and CR[04] pinning is
of dubious value in this code path, simply write the stored values.
Fixes: e81dc127ef69 ("x86/callthunks: Add call patching for call depth tracking")
Reported-by: Joan Bruguera <joanbrugueram@gmail.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
---
arch/x86/power/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -208,11 +208,11 @@ static void notrace __restore_processor_
#else
/* CONFIG X86_64 */
native_wrmsrl(MSR_EFER, ctxt->efer);
- native_write_cr4(ctxt->cr4);
+ asm volatile("mov %0,%%cr4": "+r" (ctxt->cr4) : : "memory");
#endif
native_write_cr3(ctxt->cr3);
native_write_cr2(ctxt->cr2);
- native_write_cr0(ctxt->cr0);
+ asm volatile("mov %0,%%cr0": "+r" (ctxt->cr0) : : "memory");
/* Restore the IDT. */
native_load_idt(&ctxt->idt);