D1 has a crypto engine similar to the one in other Allwinner SoCs.
Like H6, it has a separate MBUS clock gate.
It also requires the internal RC oscillator to be enabled for the TRNG
to return data, presumably because noise from the oscillator is used as
an entropy source. This is likely the case for earlier variants as well,
but it really only matters for H616 and newer SoCs, as H6 provides no
way to disable the internal oscillator.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
I noticed that the vendor driver has code to explicitly enable IOSC when
using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
a different binding/driver in mainline.
Changes in v2:
- Add TRNG clock
.../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml
index 026a9f9e1aeb..4287678aa79f 100644
--- a/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml
+++ b/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml
@@ -14,6 +14,7 @@ properties:
enum:
- allwinner,sun8i-h3-crypto
- allwinner,sun8i-r40-crypto
+ - allwinner,sun20i-d1-crypto
- allwinner,sun50i-a64-crypto
- allwinner,sun50i-h5-crypto
- allwinner,sun50i-h6-crypto
@@ -29,6 +30,7 @@ properties:
- description: Bus clock
- description: Module clock
- description: MBus clock
+ - description: TRNG clock (RC oscillator)
minItems: 2
clock-names:
@@ -36,6 +38,7 @@ properties:
- const: bus
- const: mod
- const: ram
+ - const: trng
minItems: 2
resets:
@@ -44,19 +47,33 @@ properties:
if:
properties:
compatible:
- const: allwinner,sun50i-h6-crypto
+ enum:
+ - allwinner,sun20i-d1-crypto
then:
properties:
clocks:
- minItems: 3
+ minItems: 4
clock-names:
- minItems: 3
+ minItems: 4
else:
- properties:
- clocks:
- maxItems: 2
- clock-names:
- maxItems: 2
+ if:
+ properties:
+ compatible:
+ const: allwinner,sun50i-h6-crypto
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 3
+ clock-names:
+ minItems: 3
+ maxItems: 3
+ else:
+ properties:
+ clocks:
+ maxItems: 2
+ clock-names:
+ maxItems: 2
required:
- compatible
--
2.37.4On Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland wrote: > D1 has a crypto engine similar to the one in other Allwinner SoCs. > Like H6, it has a separate MBUS clock gate. > > It also requires the internal RC oscillator to be enabled for the TRNG > to return data, presumably because noise from the oscillator is used as > an entropy source. This is likely the case for earlier variants as well, > but it really only matters for H616 and newer SoCs, as H6 provides no > way to disable the internal oscillator. > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > I noticed that the vendor driver has code to explicitly enable IOSC when > using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by > a different binding/driver in mainline. > > Changes in v2: > - Add TRNG clock > > .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++----- > 1 file changed, 25 insertions(+), 8 deletions(-) This doesn't have an ack from Rob Herring. Would you like me to apply just the crypto patch by itself? Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On 13/01/2023 04:51, Herbert Xu wrote: > On Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland wrote: >> D1 has a crypto engine similar to the one in other Allwinner SoCs. >> Like H6, it has a separate MBUS clock gate. >> >> It also requires the internal RC oscillator to be enabled for the TRNG >> to return data, presumably because noise from the oscillator is used as >> an entropy source. This is likely the case for earlier variants as well, >> but it really only matters for H616 and newer SoCs, as H6 provides no >> way to disable the internal oscillator. >> >> Signed-off-by: Samuel Holland <samuel@sholland.org> >> --- >> I noticed that the vendor driver has code to explicitly enable IOSC when >> using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by >> a different binding/driver in mainline. >> >> Changes in v2: >> - Add TRNG clock >> >> .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++----- >> 1 file changed, 25 insertions(+), 8 deletions(-) > > This doesn't have an ack from Rob Herring. Would you like me > to apply just the crypto patch by itself? But it has my Reviewed-by, which is equivalent. Please take it via crypto with the driver change. Best regards, Krzysztof
On Fri, Jan 13, 2023 at 09:33:32AM +0100, Krzysztof Kozlowski wrote: > > But it has my Reviewed-by, which is equivalent. Please take it via > crypto with the driver change. Thanks for the clarification. I'll take patches 1+2 then. Patch 3 doesn't apply to cryptodev as the file doesn't exist in my tree. Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Le Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland a écrit : > D1 has a crypto engine similar to the one in other Allwinner SoCs. > Like H6, it has a separate MBUS clock gate. > > It also requires the internal RC oscillator to be enabled for the TRNG > to return data, presumably because noise from the oscillator is used as > an entropy source. This is likely the case for earlier variants as well, > but it really only matters for H616 and newer SoCs, as H6 provides no > way to disable the internal oscillator. > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > I noticed that the vendor driver has code to explicitly enable IOSC when > using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by > a different binding/driver in mainline. > > Changes in v2: > - Add TRNG clock > > .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++----- > 1 file changed, 25 insertions(+), 8 deletions(-) > Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Thanks
On 31/12/2022 23:01, Samuel Holland wrote: > D1 has a crypto engine similar to the one in other Allwinner SoCs. > Like H6, it has a separate MBUS clock gate. > > It also requires the internal RC oscillator to be enabled for the TRNG > to return data, presumably because noise from the oscillator is used as > an entropy source. This is likely the case for earlier variants as well, > but it really only matters for H616 and newer SoCs, as H6 provides no > way to disable the internal oscillator. > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
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