[PATCH net-next v4 0/4] phy: aquantia: Determine rate adaptation support from registers

Sean Anderson posted 4 patches 3 years, 3 months ago
There is a newer version of this series
drivers/net/phy/aquantia_main.c | 160 ++++++++++++++++++++++++++++++--
drivers/net/phy/phy-core.c      |  70 ++++++++++++++
drivers/net/phy/phylink.c       |  75 +--------------
include/linux/phy.h             |   1 +
include/uapi/linux/mdio.h       | 109 ++++++++++++++--------
5 files changed, 299 insertions(+), 116 deletions(-)
[PATCH net-next v4 0/4] phy: aquantia: Determine rate adaptation support from registers
Posted by Sean Anderson 3 years, 3 months ago
This attempts to address the problems first reported in [1]. Tim has an
Aquantia phy where the firmware is set up to use "5G XFI" (underclocked
10GBASE-R) when rate adapting lower speeds. This results in us
advertising that we support lower speeds and then failing to bring the
link up. To avoid this, determine whether to enable rate adaptation
based on what's programmed by the firmware. This is "the worst choice"
[2], but we can't really do better until we have more insight into
what the firmware is doing. At the very least, we can prevent bad
firmware from causing us to advertise the wrong modes.

Past submissions may be found at [3, 4].

[1] https://lore.kernel.org/netdev/CAJ+vNU3zeNqiGhjTKE8jRjDYR0D7f=iqPLB8phNyA2CWixy7JA@mail.gmail.com/
[2] https://lore.kernel.org/netdev/20221118171643.vu6uxbnmog4sna65@skbuf/
[3] https://lore.kernel.org/netdev/20221114210740.3332937-1-sean.anderson@seco.com/
[4] https://lore.kernel.org/netdev/20221128195409.100873-1-sean.anderson@seco.com/

Changes in v4:
- Reorganize MDIO defines
- Fix kerneldoc using - instead of : for parameters

Changes in v3:
- Update speed register bits
- Fix incorrect bits for PMA/PMD speed

Changes in v2:
- Move/rename phylink_interface_max_speed
- Rework to just validate things instead of modifying registers

Sean Anderson (4):
  net: phy: Move/rename phylink_interface_max_speed
  phy: mdio: Reorganize defines
  net: mdio: Update speed register bits
  phy: aquantia: Determine rate adaptation support from registers

 drivers/net/phy/aquantia_main.c | 160 ++++++++++++++++++++++++++++++--
 drivers/net/phy/phy-core.c      |  70 ++++++++++++++
 drivers/net/phy/phylink.c       |  75 +--------------
 include/linux/phy.h             |   1 +
 include/uapi/linux/mdio.h       | 109 ++++++++++++++--------
 5 files changed, 299 insertions(+), 116 deletions(-)

-- 
2.35.1.1320.gc452695387.dirty
Re: [PATCH net-next v4 0/4] phy: aquantia: Determine rate adaptation support from registers
Posted by Russell King (Oracle) 3 years, 3 months ago
Hi Sean,

Please note net-next is currently closed due to the merge window, so
please don't send patches for it. However, feel free to send RFC
patches for net-next so that reviews can still happen.

Thanks!

On Fri, Dec 16, 2022 at 11:48:47AM -0500, Sean Anderson wrote:
> This attempts to address the problems first reported in [1]. Tim has an
> Aquantia phy where the firmware is set up to use "5G XFI" (underclocked
> 10GBASE-R) when rate adapting lower speeds. This results in us
> advertising that we support lower speeds and then failing to bring the
> link up. To avoid this, determine whether to enable rate adaptation
> based on what's programmed by the firmware. This is "the worst choice"
> [2], but we can't really do better until we have more insight into
> what the firmware is doing. At the very least, we can prevent bad
> firmware from causing us to advertise the wrong modes.
> 
> Past submissions may be found at [3, 4].
> 
> [1] https://lore.kernel.org/netdev/CAJ+vNU3zeNqiGhjTKE8jRjDYR0D7f=iqPLB8phNyA2CWixy7JA@mail.gmail.com/
> [2] https://lore.kernel.org/netdev/20221118171643.vu6uxbnmog4sna65@skbuf/
> [3] https://lore.kernel.org/netdev/20221114210740.3332937-1-sean.anderson@seco.com/
> [4] https://lore.kernel.org/netdev/20221128195409.100873-1-sean.anderson@seco.com/
> 
> Changes in v4:
> - Reorganize MDIO defines
> - Fix kerneldoc using - instead of : for parameters
> 
> Changes in v3:
> - Update speed register bits
> - Fix incorrect bits for PMA/PMD speed
> 
> Changes in v2:
> - Move/rename phylink_interface_max_speed
> - Rework to just validate things instead of modifying registers
> 
> Sean Anderson (4):
>   net: phy: Move/rename phylink_interface_max_speed
>   phy: mdio: Reorganize defines
>   net: mdio: Update speed register bits
>   phy: aquantia: Determine rate adaptation support from registers
> 
>  drivers/net/phy/aquantia_main.c | 160 ++++++++++++++++++++++++++++++--
>  drivers/net/phy/phy-core.c      |  70 ++++++++++++++
>  drivers/net/phy/phylink.c       |  75 +--------------
>  include/linux/phy.h             |   1 +
>  include/uapi/linux/mdio.h       | 109 ++++++++++++++--------
>  5 files changed, 299 insertions(+), 116 deletions(-)
> 
> -- 
> 2.35.1.1320.gc452695387.dirty
> 
> 

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