From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
In Rockchip vendor kernel, the core PHY initialization is disabled with
the following justification:
The usb phys need to be controlled dynamically on some Rockchip SoCs.
So set the new HCD flag which prevents USB core from trying to manage
our phys.
This is required to get USB gadget working in dual-role mode on Ringneck
PX30 SoM on a Haikou Devkit.
Cc: Bin Yang <yangbin@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
drivers/usb/dwc2/params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 9ed9fd956940..9095437b3236 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -117,6 +117,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
p->lpm_clock_gating = false;
p->besl = false;
p->hird_threshold_en = false;
+ p->hcd_skip_phy_initialization = 1;
}
static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
--
2.38.1
Hi Quentin, On 12/16/2022 8:29 PM, Quentin Schulz <foss+kernel@0leil.net> wrote: >From: Quentin Schulz <foss+kernel@0leil.net> >Sent: Friday, December 16, 2022 8:29 PM >To: Minas Harutyunyan <hminas@synopsys.com>; Greg Kroah-Hartman ><gregkh@linuxfoundation.org> >Cc: Quentin Schulz <foss+kernel@0leil.net>; linux-usb@vger.kernel.org; >linux-kernel@vger.kernel.org; Bin Yang <yangbin@rock-chips.com>; Quentin >Schulz <quentin.schulz@theobroma-systems.com> >Subject: [PATCH v2 2/2] usb: dwc2: prevent core PHY initialization on >Rockchip > >From: Quentin Schulz <quentin.schulz@theobroma-systems.com> > >In Rockchip vendor kernel, the core PHY initialization is disabled with the >following justification: > > The usb phys need to be controlled dynamically on some Rockchip SoCs. > So set the new HCD flag which prevents USB core from trying to manage our >phys. > >This is required to get USB gadget working in dual-role mode on Ringneck >PX30 SoM on a Haikou Devkit. > >Cc: Bin Yang <yangbin@rock-chips.com> >Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> >--- > drivers/usb/dwc2/params.c | 1 + > 1 file changed, 1 insertion(+) > >diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index >9ed9fd956940..9095437b3236 100644 >--- a/drivers/usb/dwc2/params.c >+++ b/drivers/usb/dwc2/params.c >@@ -117,6 +117,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) > p->lpm_clock_gating = false; > p->besl = false; > p->hird_threshold_en = false; >+ p->hcd_skip_phy_initialization = 1; I'm not familiar with all "rk" platforms, but are you sure that p->hcd_skip_phy_initialization = 1 required for all of them? > } > > static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) > >-- >2.38.1 To avoid any misinterpretation please add to dwc2_set_default_params() function setting hcd_skip_phy_initialization to 0. Thanks, Minas
Hi Minas, On 12/20/22 07:02, Minas Harutyunyan wrote: > Hi Quentin, > > On 12/16/2022 8:29 PM, Quentin Schulz <foss+kernel@0leil.net> wrote: >> From: Quentin Schulz <foss+kernel@0leil.net> >> Sent: Friday, December 16, 2022 8:29 PM >> To: Minas Harutyunyan <hminas@synopsys.com>; Greg Kroah-Hartman >> <gregkh@linuxfoundation.org> >> Cc: Quentin Schulz <foss+kernel@0leil.net>; linux-usb@vger.kernel.org; >> linux-kernel@vger.kernel.org; Bin Yang <yangbin@rock-chips.com>; Quentin >> Schulz <quentin.schulz@theobroma-systems.com> >> Subject: [PATCH v2 2/2] usb: dwc2: prevent core PHY initialization on >> Rockchip >> >> From: Quentin Schulz <quentin.schulz@theobroma-systems.com> >> >> In Rockchip vendor kernel, the core PHY initialization is disabled with the >> following justification: >> >> The usb phys need to be controlled dynamically on some Rockchip SoCs. >> So set the new HCD flag which prevents USB core from trying to manage our >> phys. >> >> This is required to get USB gadget working in dual-role mode on Ringneck >> PX30 SoM on a Haikou Devkit. >> >> Cc: Bin Yang <yangbin@rock-chips.com> >> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> >> --- >> drivers/usb/dwc2/params.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index >> 9ed9fd956940..9095437b3236 100644 >> --- a/drivers/usb/dwc2/params.c >> +++ b/drivers/usb/dwc2/params.c >> @@ -117,6 +117,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) >> p->lpm_clock_gating = false; >> p->besl = false; >> p->hird_threshold_en = false; >> + p->hcd_skip_phy_initialization = 1; > > I'm not familiar with all "rk" platforms, but are you sure that > p->hcd_skip_phy_initialization = 1 required for all of them? > No I am not. This is however applied to all devices (even non-Rockchip ones) in Rockchip vendor kernel. I could check on an RK3368 since we have a module available for that, but I don't have access to any other Rockchip platform. From a quick grep, the following seems to be susceptible to this change: rk3128 rv1108 rk3288 rk3036 rk3228-evb rk3229 rk3066a rk3188 rk3328 px30 rk3308 rk3368 Cheers, Quentin
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