On 11/11/22 08:55, Bjorn Andersson wrote:
> Add a device node for the EPSS L3 frequency domain.
>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
>
> Changes since v1:
> - None
>
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 6bc12e507d21..0e80cdcf6bcf 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1782,6 +1782,16 @@
> };
> };
>
> + epss_l3: interconnect@18590000 {
> + compatible = "qcom,sc8280xp-epss-l3", "qcom,epss-l3";
> + reg = <0 0x18590000 0 0x1000>;
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
> + clock-names = "xo", "alternate";
> +
> + #interconnect-cells = <1>;
> + };
> +
> cpufreq_hw: cpufreq@18591000 {
> compatible = "qcom,sc8280xp-cpufreq-epss", "qcom,cpufreq-epss";
> reg = <0 0x18591000 0 0x1000>,