From: Bjorn Andersson <bjorn.andersson@linaro.org>
The SA8295P ADP has, among other interfaces, six MiniDP connectors which
are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
DP PHYs and link them all together.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
Changes since v2:
- New patch on list
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 244 ++++++++++++++++++++++-
1 file changed, 242 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index 2c62ba6a49c5..f35345115c85 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -23,6 +23,90 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
+
+ dp2-connector {
+ compatible = "dp-connector";
+ label = "DP2";
+ type = "mini";
+
+ hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
+
+ port {
+ dp2_connector_in: endpoint {
+ remote-endpoint = <&mdss1_dp0_phy_out>;
+ };
+ };
+ };
+
+ dp3-connector {
+ compatible = "dp-connector";
+ label = "DP3";
+ type = "mini";
+
+ hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+
+ port {
+ dp3_connector_in: endpoint {
+ remote-endpoint = <&mdss1_dp1_phy_out>;
+ };
+ };
+ };
+
+ edp0-connector {
+ compatible = "dp-connector";
+ label = "EDP0";
+ type = "mini";
+
+ hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+
+ port {
+ edp0_connector_in: endpoint {
+ remote-endpoint = <&mdss0_dp2_phy_out>;
+ };
+ };
+ };
+
+ edp1-connector {
+ compatible = "dp-connector";
+ label = "EDP1";
+ type = "mini";
+
+ hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+
+ port {
+ edp1_connector_in: endpoint {
+ remote-endpoint = <&mdss0_dp3_phy_out>;
+ };
+ };
+ };
+
+ edp2-connector {
+ compatible = "dp-connector";
+ label = "EDP2";
+ type = "mini";
+
+ hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
+
+ port {
+ edp2_connector_in: endpoint {
+ remote-endpoint = <&mdss1_dp2_phy_out>;
+ };
+ };
+ };
+
+ edp3-connector {
+ compatible = "dp-connector";
+ label = "EDP3";
+ type = "mini";
+
+ hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
+
+ port {
+ edp3_connector_in: endpoint {
+ remote-endpoint = <&mdss1_dp3_phy_out>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -156,13 +240,169 @@ vreg_l7g: ldo7 {
vreg_l8g: ldo8 {
regulator-name = "vreg_l8g";
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ };
+
+ vreg_l11g: ldo11 {
+ regulator-name = "vreg_l11g";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
};
+&dispcc0 {
+ status = "okay";
+};
+
+&dispcc1 {
+ status = "okay";
+};
+
+&mdss0 {
+ status = "okay";
+};
+
+&mdss0_dp2 {
+ status = "okay";
+
+ data-lanes = <0 1 2 3>;
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss0_dp2_phy_out: endpoint {
+ remote-endpoint = <&edp0_connector_in>;
+ };
+ };
+ };
+};
+
+&mdss0_dp2_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l8g>;
+ vdda-pll-supply = <&vreg_l3g>;
+};
+
+&mdss0_dp3 {
+ status = "okay";
+
+ data-lanes = <0 1 2 3>;
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss0_dp3_phy_out: endpoint {
+ remote-endpoint = <&edp1_connector_in>;
+ };
+ };
+ };
+};
+
+&mdss0_dp3_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l8g>;
+ vdda-pll-supply = <&vreg_l3g>;
+};
+
+&mdss1 {
+ status = "okay";
+};
+
+&mdss1_dp0 {
+ status = "okay";
+
+ data-lanes = <0 1 2 3>;
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss1_dp0_phy_out: endpoint {
+ remote-endpoint = <&dp2_connector_in>;
+ };
+ };
+ };
+};
+
+&mdss1_dp0_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l11g>;
+ vdda-pll-supply = <&vreg_l3g>;
+};
+
+&mdss1_dp1 {
+ status = "okay";
+
+ data-lanes = <0 1 2 3>;
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss1_dp1_phy_out: endpoint {
+ remote-endpoint = <&dp3_connector_in>;
+ };
+ };
+ };
+};
+
+&mdss1_dp1_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l11g>;
+ vdda-pll-supply = <&vreg_l3g>;
+};
+
+&mdss1_dp2 {
+ status = "okay";
+
+ data-lanes = <0 1 2 3>;
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss1_dp2_phy_out: endpoint {
+ remote-endpoint = <&edp2_connector_in>;
+ };
+ };
+ };
+};
+
+&mdss1_dp2_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l11g>;
+ vdda-pll-supply = <&vreg_l3g>;
+};
+
+&mdss1_dp3 {
+ status = "okay";
+
+ data-lanes = <0 1 2 3>;
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss1_dp3_phy_out: endpoint {
+ remote-endpoint = <&edp3_connector_in>;
+ };
+ };
+ };
+};
+
+&mdss1_dp3_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l11g>;
+ vdda-pll-supply = <&vreg_l3g>;
+};
+
&qup2 {
status = "okay";
};
--
2.37.3On Tue, Oct 25, 2022 at 08:26:24PM -0700, Bjorn Andersson wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> The SA8295P ADP has, among other interfaces, six MiniDP connectors which
> are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
>
> Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
> DP PHYs and link them all together.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
> &apps_rsc {
> @@ -156,13 +240,169 @@ vreg_l7g: ldo7 {
>
> vreg_l8g: ldo8 {
> regulator-name = "vreg_l8g";
> - regulator-min-microvolt = <880000>;
> - regulator-max-microvolt = <880000>;
> + regulator-min-microvolt = <912000>;
> + regulator-max-microvolt = <912000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + regulator-allow-set-load;
Did you really intend to allow set-load here?
I'm guessing this wasn't the case, but otherwise you also need to
specify the valid modes.
> + };
> +
> + vreg_l11g: ldo11 {
> + regulator-name = "vreg_l11g";
> + regulator-min-microvolt = <912000>;
> + regulator-max-microvolt = <912000>;
> regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> };
> };
> };
> +&mdss0_dp2_phy {
> + status = "okay";
> +
> + vdda-phy-supply = <&vreg_l8g>;
> + vdda-pll-supply = <&vreg_l3g>;
> +};
Johan
On Wed, Oct 26, 2022 at 01:50:15PM +0200, Johan Hovold wrote:
> On Tue, Oct 25, 2022 at 08:26:24PM -0700, Bjorn Andersson wrote:
> > From: Bjorn Andersson <bjorn.andersson@linaro.org>
> >
> > The SA8295P ADP has, among other interfaces, six MiniDP connectors which
> > are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
> >
> > Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
> > DP PHYs and link them all together.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> > ---
>
> > &apps_rsc {
> > @@ -156,13 +240,169 @@ vreg_l7g: ldo7 {
> >
> > vreg_l8g: ldo8 {
> > regulator-name = "vreg_l8g";
> > - regulator-min-microvolt = <880000>;
> > - regulator-max-microvolt = <880000>;
> > + regulator-min-microvolt = <912000>;
> > + regulator-max-microvolt = <912000>;
> > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> > + regulator-allow-set-load;
>
> Did you really intend to allow set-load here?
>
> I'm guessing this wasn't the case, but otherwise you also need to
> specify the valid modes.
>
I see no reason for keeping it at this point in time, will drop it.
Thanks,
Bjorn
> > + };
> > +
> > + vreg_l11g: ldo11 {
> > + regulator-name = "vreg_l11g";
> > + regulator-min-microvolt = <912000>;
> > + regulator-max-microvolt = <912000>;
> > regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> > };
> > };
> > };
>
> > +&mdss0_dp2_phy {
> > + status = "okay";
> > +
> > + vdda-phy-supply = <&vreg_l8g>;
> > + vdda-pll-supply = <&vreg_l3g>;
> > +};
>
> Johan
© 2016 - 2026 Red Hat, Inc.